Home
last modified time | relevance | path

Searched refs:A3XX_RB_LRZ_VSC_CONTROL_BINNING_ENABLE (Results 1 – 2 of 2) sorted by relevance

/external/mesa3d/src/gallium/drivers/freedreno/a3xx/
Dfd3_gmem.c842 OUT_RING(ring, A3XX_RB_LRZ_VSC_CONTROL_BINNING_ENABLE); in emit_binning_pass()
Da3xx.xml.h1622 #define A3XX_RB_LRZ_VSC_CONTROL_BINNING_ENABLE 0x00000002 macro