| /external/tcpdump/ |
| D | in_cksum.c | 53 #define ADDCARRY(x) {if ((x) > 65535) (x) -= 65535;} macro
54 #define REDUCE {l_util.l = sum; sum = l_util.s[0] + l_util.s[1]; ADDCARRY(sum);}
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| /external/iputils/ |
| D | clockdiff.c | 40 #undef ADDCARRY
41 #define ADDCARRY(sum) { \ macro
69 ADDCARRY(sum); in in_cksum()
82 ADDCARRY(sum); in in_cksum()
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 242 ADDCARRY, SUBCARRY, enumerator
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUInstrInfo.td | 216 // TODO: remove AMDGPUadde/AMDGPUsube when ADDCARRY/SUBCARRY get their own
218 def AMDGPUadde : SDNode<"ISD::ADDCARRY", AMDGPUAddeSubeOp, []>;
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| D | SIISelLowering.cpp | 232 setOperationAction(ISD::ADDCARRY, MVT::i32, Legal); in SITargetLowering()
236 setOperationAction(ISD::ADDCARRY, MVT::i64, Legal); in SITargetLowering()
619 setTargetDAGCombine(ISD::ADDCARRY); in SITargetLowering()
7395 Opc == ISD::ANY_EXTEND || Opc == ISD::ADDCARRY) in performAddCombine()
7409 Opc = (Opc == ISD::SIGN_EXTEND) ? ISD::SUBCARRY : ISD::ADDCARRY; in performAddCombine()
7412 case ISD::ADDCARRY: { in performAddCombine()
7417 return DAG.getNode(ISD::ADDCARRY, SDLoc(N), RHS->getVTList(), Args); in performAddCombine()
7467 if ((LHSOpc == ISD::ADD && Opc == ISD::ADDCARRY) || in performAddCarrySubCarryCombine()
7801 case ISD::ADDCARRY: in PerformDAGCombine()
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| D | AMDGPUISelLowering.cpp | 1626 SDValue Add1_Lo = DAG.getNode(ISD::ADDCARRY, DL, HalfCarryVT, Rcp_Lo, in LowerUDIVREM64()
1628 SDValue Add1_Hi = DAG.getNode(ISD::ADDCARRY, DL, HalfCarryVT, Rcp_Hi, in LowerUDIVREM64()
1641 SDValue Add2_Lo = DAG.getNode(ISD::ADDCARRY, DL, HalfCarryVT, Add1_Lo, in LowerUDIVREM64()
1643 SDValue Add2_HiC = DAG.getNode(ISD::ADDCARRY, DL, HalfCarryVT, Add1_HiNc, in LowerUDIVREM64()
1645 SDValue Add2_Hi = DAG.getNode(ISD::ADDCARRY, DL, HalfCarryVT, Add2_HiC, in LowerUDIVREM64()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.h | 99 SADDO, SSUBO, UADDO, USUBO, ADDCARRY, SUBCARRY, enumerator
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| D | SystemZISelLowering.cpp | 176 setOperationAction(ISD::ADDCARRY, VT, Custom); in SystemZTargetLowering()
3281 case ISD::ADDCARRY: in lowerADDSUBCARRY()
3282 BaseOp = SystemZISD::ADDCARRY; in lowerADDSUBCARRY()
4817 case ISD::ADDCARRY: in LowerOperation()
5002 OPCODE(ADDCARRY); in getTargetNodeName()
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| D | SystemZOperators.td | 280 def z_addcarry_1 : SDNode<"SystemZISD::ADDCARRY", SDT_ZBinaryWithCarry>;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeIntegerTypes.cpp | 141 case ISD::ADDCARRY: in PromoteIntegerResult()
961 case ISD::ADDCARRY: in PromoteIntegerOperand()
1465 case ISD::ADDCARRY: in ExpandIntegerResult()
1812 N->getOpcode() == ISD::ADD ? ISD::ADDCARRY : ISD::SUBCARRY, in ExpandIntRes_ADDSUB()
1819 Hi = DAG.getNode(ISD::ADDCARRY, dl, VTList, HiOps); in ExpandIntRes_ADDSUB()
1981 N->getOpcode() == ISD::ADD ? ISD::ADDCARRY : ISD::SUBCARRY, in ExpandIntRes_UADDSUBO()
1993 unsigned Opc = N->getOpcode() == ISD::UADDO ? ISD::ADDCARRY : ISD::SUBCARRY; in ExpandIntRes_UADDSUBO()
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| D | SelectionDAGDumper.cpp | 269 case ISD::ADDCARRY: return "addcarry"; in getOperationName()
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| D | DAGCombiner.cpp | 1509 case ISD::ADDCARRY: return visitADDCARRY(N); in visit()
2217 if (V.getOpcode() != ISD::ADDCARRY && V.getOpcode() != ISD::SUBCARRY && in getAsCarry()
2275 if (N1.getOpcode() == ISD::ADDCARRY && isNullConstant(N1.getOperand(1)) && in visitADDLike()
2277 return DAG.getNode(ISD::ADDCARRY, DL, N1->getVTList(), in visitADDLike()
2281 if (TLI.isOperationLegalOrCustom(ISD::ADDCARRY, VT)) in visitADDLike()
2283 return DAG.getNode(ISD::ADDCARRY, DL, in visitADDLike()
2405 if (N1.getOpcode() == ISD::ADDCARRY && isNullConstant(N1.getOperand(1))) { in visitUADDOLike()
2409 return DAG.getNode(ISD::ADDCARRY, SDLoc(N), N->getVTList(), N0, Y, in visitUADDOLike()
2414 if (TLI.isOperationLegalOrCustom(ISD::ADDCARRY, VT)) in visitUADDOLike()
2416 return DAG.getNode(ISD::ADDCARRY, SDLoc(N), N->getVTList(), N0, in visitUADDOLike()
[all …]
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| D | SelectionDAG.cpp | 2777 case ISD::ADDCARRY: in computeKnownBits()
2806 if (Opcode == ISD::ADDE || Opcode == ISD::ADDCARRY) { in computeKnownBits()
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| D | LegalizeDAG.cpp | 3503 unsigned OpcCarry = IsAdd ? ISD::ADDCARRY : ISD::SUBCARRY; in ExpandNode()
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| /external/swiftshader/third_party/llvm-7.0/llvm/docs/ |
| D | ReleaseNotes.rst | 290 should use ``UADDO``/``ADDCARRY``/``USUBO``/``SUBCARRY`` instead of the deprecated opcodes.
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 1340 setOperationAction(ISD::ADDCARRY, VT, Expand); in HexagonTargetLowering()
1343 setOperationAction(ISD::ADDCARRY, MVT::i64, Custom); in HexagonTargetLowering()
2736 if (Opc == ISD::ADDCARRY) in LowerAddSubCarry()
2806 case ISD::ADDCARRY: in LowerOperation()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 620 setOperationAction(ISD::ADDCARRY, VT, Expand); in initActions()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86ISelDAGToDAG.cpp | 525 case ISD::ADDCARRY: in IsProfitableToFold()
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| D | X86ISelLowering.cpp | 1662 setOperationAction(ISD::ADDCARRY, VT, Custom); in X86TargetLowering()
24888 unsigned Opc = Op.getOpcode() == ISD::ADDCARRY ? X86ISD::ADC : X86ISD::SBB; in LowerADDSUBCARRY()
25376 case ISD::ADDCARRY: in LowerOperation()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 810 setOperationAction(ISD::ADDCARRY, MVT::i32, Custom); in ARMTargetLowering()
7735 if (Op.getOpcode() == ISD::ADDCARRY) { in LowerADDSUBCARRY()
8120 case ISD::ADDCARRY: in LowerOperation()
12680 Res = DAG.getNode(ISD::ADDCARRY, dl, VTs, Sub, Neg, Carry); in PerformCMOVCombine()
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