1 /* 2 * Copyright © 2016 Advanced Micro Devices, Inc. 3 * All Rights Reserved. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining 6 * a copy of this software and associated documentation files (the 7 * "Software"), to deal in the Software without restriction, including 8 * without limitation the rights to use, copy, modify, merge, publish, 9 * distribute, sub license, and/or sell copies of the Software, and to 10 * permit persons to whom the Software is furnished to do so, subject to 11 * the following conditions: 12 * 13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 14 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 15 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 16 * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS 17 * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 20 * USE OR OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * The above copyright notice and this permission notice (including the 23 * next paragraph) shall be included in all copies or substantial portions 24 * of the Software. 25 */ 26 27 /** 28 **************************************************************************************************** 29 * @file addrlib1.h 30 * @brief Contains the Addr::V1::Lib class definition. 31 **************************************************************************************************** 32 */ 33 34 #ifndef __ADDR_LIB1_H__ 35 #define __ADDR_LIB1_H__ 36 37 #include "addrlib.h" 38 39 namespace Addr 40 { 41 namespace V1 42 { 43 44 /** 45 **************************************************************************************************** 46 * @brief Neutral enums that define bank swap size 47 **************************************************************************************************** 48 */ 49 enum SampleSplitSize 50 { 51 ADDR_SAMPLESPLIT_1KB = 1024, 52 ADDR_SAMPLESPLIT_2KB = 2048, 53 ADDR_SAMPLESPLIT_4KB = 4096, 54 ADDR_SAMPLESPLIT_8KB = 8192, 55 }; 56 57 /** 58 **************************************************************************************************** 59 * @brief Flags for AddrTileMode 60 **************************************************************************************************** 61 */ 62 struct TileModeFlags 63 { 64 UINT_32 thickness : 4; 65 UINT_32 isLinear : 1; 66 UINT_32 isMicro : 1; 67 UINT_32 isMacro : 1; 68 UINT_32 isMacro3d : 1; 69 UINT_32 isPrt : 1; 70 UINT_32 isPrtNoRotation : 1; 71 UINT_32 isBankSwapped : 1; 72 }; 73 74 static const UINT_32 Block64K = 0x10000; 75 static const UINT_32 PrtTileSize = Block64K; 76 77 /** 78 **************************************************************************************************** 79 * @brief This class contains asic independent address lib functionalities 80 **************************************************************************************************** 81 */ 82 class Lib : public Addr::Lib 83 { 84 public: 85 virtual ~Lib(); 86 87 static Lib* GetLib( 88 ADDR_HANDLE hLib); 89 90 /// Returns tileIndex support UseTileIndex(INT_32 index)91 BOOL_32 UseTileIndex(INT_32 index) const 92 { 93 return m_configFlags.useTileIndex && (index != TileIndexInvalid); 94 } 95 96 /// Returns combined swizzle support UseCombinedSwizzle()97 BOOL_32 UseCombinedSwizzle() const 98 { 99 return m_configFlags.useCombinedSwizzle; 100 } 101 102 // 103 // Interface stubs 104 // 105 ADDR_E_RETURNCODE ComputeSurfaceInfo( 106 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, 107 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; 108 109 ADDR_E_RETURNCODE ComputeSurfaceAddrFromCoord( 110 const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, 111 ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const; 112 113 ADDR_E_RETURNCODE ComputeSurfaceCoordFromAddr( 114 const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn, 115 ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut) const; 116 117 ADDR_E_RETURNCODE ComputeSliceTileSwizzle( 118 const ADDR_COMPUTE_SLICESWIZZLE_INPUT* pIn, 119 ADDR_COMPUTE_SLICESWIZZLE_OUTPUT* pOut) const; 120 121 ADDR_E_RETURNCODE ExtractBankPipeSwizzle( 122 const ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT* pIn, 123 ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT* pOut) const; 124 125 ADDR_E_RETURNCODE CombineBankPipeSwizzle( 126 const ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT* pIn, 127 ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT* pOut) const; 128 129 ADDR_E_RETURNCODE ComputeBaseSwizzle( 130 const ADDR_COMPUTE_BASE_SWIZZLE_INPUT* pIn, 131 ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT* pOut) const; 132 133 ADDR_E_RETURNCODE ComputeFmaskInfo( 134 const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, 135 ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut); 136 137 ADDR_E_RETURNCODE ComputeFmaskAddrFromCoord( 138 const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn, 139 ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut) const; 140 141 ADDR_E_RETURNCODE ComputeFmaskCoordFromAddr( 142 const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn, 143 ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut) const; 144 145 ADDR_E_RETURNCODE ConvertTileInfoToHW( 146 const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn, 147 ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut) const; 148 149 ADDR_E_RETURNCODE ConvertTileIndex( 150 const ADDR_CONVERT_TILEINDEX_INPUT* pIn, 151 ADDR_CONVERT_TILEINDEX_OUTPUT* pOut) const; 152 153 ADDR_E_RETURNCODE GetMacroModeIndex( 154 const ADDR_GET_MACROMODEINDEX_INPUT* pIn, 155 ADDR_GET_MACROMODEINDEX_OUTPUT* pOut) const; 156 157 ADDR_E_RETURNCODE ConvertTileIndex1( 158 const ADDR_CONVERT_TILEINDEX1_INPUT* pIn, 159 ADDR_CONVERT_TILEINDEX_OUTPUT* pOut) const; 160 161 ADDR_E_RETURNCODE GetTileIndex( 162 const ADDR_GET_TILEINDEX_INPUT* pIn, 163 ADDR_GET_TILEINDEX_OUTPUT* pOut) const; 164 165 ADDR_E_RETURNCODE ComputeHtileInfo( 166 const ADDR_COMPUTE_HTILE_INFO_INPUT* pIn, 167 ADDR_COMPUTE_HTILE_INFO_OUTPUT* pOut) const; 168 169 ADDR_E_RETURNCODE ComputeCmaskInfo( 170 const ADDR_COMPUTE_CMASK_INFO_INPUT* pIn, 171 ADDR_COMPUTE_CMASK_INFO_OUTPUT* pOut) const; 172 173 ADDR_E_RETURNCODE ComputeDccInfo( 174 const ADDR_COMPUTE_DCCINFO_INPUT* pIn, 175 ADDR_COMPUTE_DCCINFO_OUTPUT* pOut) const; 176 177 ADDR_E_RETURNCODE ComputeHtileAddrFromCoord( 178 const ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn, 179 ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut) const; 180 181 ADDR_E_RETURNCODE ComputeCmaskAddrFromCoord( 182 const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn, 183 ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut) const; 184 185 ADDR_E_RETURNCODE ComputeHtileCoordFromAddr( 186 const ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn, 187 ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut) const; 188 189 ADDR_E_RETURNCODE ComputeCmaskCoordFromAddr( 190 const ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT* pIn, 191 ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT* pOut) const; 192 193 ADDR_E_RETURNCODE ComputePrtInfo( 194 const ADDR_PRT_INFO_INPUT* pIn, 195 ADDR_PRT_INFO_OUTPUT* pOut) const; 196 protected: 197 Lib(); // Constructor is protected 198 Lib(const Client* pClient); 199 200 /// Pure Virtual function for Hwl computing surface info 201 virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfo( 202 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, 203 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const = 0; 204 205 /// Pure Virtual function for Hwl computing surface address from coord 206 virtual ADDR_E_RETURNCODE HwlComputeSurfaceAddrFromCoord( 207 const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn, 208 ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const = 0; 209 210 /// Pure Virtual function for Hwl computing surface coord from address 211 virtual ADDR_E_RETURNCODE HwlComputeSurfaceCoordFromAddr( 212 const ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn, 213 ADDR_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut) const = 0; 214 215 /// Pure Virtual function for Hwl computing surface tile swizzle 216 virtual ADDR_E_RETURNCODE HwlComputeSliceTileSwizzle( 217 const ADDR_COMPUTE_SLICESWIZZLE_INPUT* pIn, 218 ADDR_COMPUTE_SLICESWIZZLE_OUTPUT* pOut) const = 0; 219 220 /// Pure Virtual function for Hwl extracting bank/pipe swizzle from base256b 221 virtual ADDR_E_RETURNCODE HwlExtractBankPipeSwizzle( 222 const ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT* pIn, 223 ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT* pOut) const = 0; 224 225 /// Pure Virtual function for Hwl combining bank/pipe swizzle 226 virtual ADDR_E_RETURNCODE HwlCombineBankPipeSwizzle( 227 UINT_32 bankSwizzle, UINT_32 pipeSwizzle, ADDR_TILEINFO* pTileInfo, 228 UINT_64 baseAddr, UINT_32* pTileSwizzle) const = 0; 229 230 /// Pure Virtual function for Hwl computing base swizzle 231 virtual ADDR_E_RETURNCODE HwlComputeBaseSwizzle( 232 const ADDR_COMPUTE_BASE_SWIZZLE_INPUT* pIn, 233 ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT* pOut) const = 0; 234 235 /// Pure Virtual function for Hwl computing HTILE base align 236 virtual UINT_32 HwlComputeHtileBaseAlign( 237 BOOL_32 isTcCompatible, BOOL_32 isLinear, ADDR_TILEINFO* pTileInfo) const = 0; 238 239 /// Pure Virtual function for Hwl computing HTILE bpp 240 virtual UINT_32 HwlComputeHtileBpp( 241 BOOL_32 isWidth8, BOOL_32 isHeight8) const = 0; 242 243 /// Pure Virtual function for Hwl computing HTILE bytes 244 virtual UINT_64 HwlComputeHtileBytes( 245 UINT_32 pitch, UINT_32 height, UINT_32 bpp, 246 BOOL_32 isLinear, UINT_32 numSlices, UINT_64* pSliceBytes, UINT_32 baseAlign) const = 0; 247 248 /// Pure Virtual function for Hwl computing FMASK info 249 virtual ADDR_E_RETURNCODE HwlComputeFmaskInfo( 250 const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, 251 ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut) = 0; 252 253 /// Pure Virtual function for Hwl FMASK address from coord 254 virtual ADDR_E_RETURNCODE HwlComputeFmaskAddrFromCoord( 255 const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn, 256 ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut) const = 0; 257 258 /// Pure Virtual function for Hwl FMASK coord from address 259 virtual ADDR_E_RETURNCODE HwlComputeFmaskCoordFromAddr( 260 const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn, 261 ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut) const = 0; 262 263 /// Pure Virtual function for Hwl convert tile info from real value to HW value 264 virtual ADDR_E_RETURNCODE HwlConvertTileInfoToHW( 265 const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn, 266 ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut) const = 0; 267 268 /// Pure Virtual function for Hwl compute mipmap info 269 virtual BOOL_32 HwlComputeMipLevel( 270 ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn) const = 0; 271 272 /// Pure Virtual function for Hwl compute max cmask blockMax value 273 virtual BOOL_32 HwlGetMaxCmaskBlockMax() const = 0; 274 275 /// Pure Virtual function for Hwl compute fmask bits 276 virtual UINT_32 HwlComputeFmaskBits( 277 const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn, 278 UINT_32* pNumSamples) const = 0; 279 280 /// Virtual function to get index (not pure then no need to implement this in all hwls HwlGetTileIndex(const ADDR_GET_TILEINDEX_INPUT * pIn,ADDR_GET_TILEINDEX_OUTPUT * pOut)281 virtual ADDR_E_RETURNCODE HwlGetTileIndex( 282 const ADDR_GET_TILEINDEX_INPUT* pIn, 283 ADDR_GET_TILEINDEX_OUTPUT* pOut) const 284 { 285 return ADDR_NOTSUPPORTED; 286 } 287 288 /// Virtual function for Hwl to compute Dcc info HwlComputeDccInfo(const ADDR_COMPUTE_DCCINFO_INPUT * pIn,ADDR_COMPUTE_DCCINFO_OUTPUT * pOut)289 virtual ADDR_E_RETURNCODE HwlComputeDccInfo( 290 const ADDR_COMPUTE_DCCINFO_INPUT* pIn, 291 ADDR_COMPUTE_DCCINFO_OUTPUT* pOut) const 292 { 293 return ADDR_NOTSUPPORTED; 294 } 295 296 /// Virtual function to get cmask address for tc compatible cmask HwlComputeCmaskAddrFromCoord(const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT * pIn,ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT * pOut)297 virtual ADDR_E_RETURNCODE HwlComputeCmaskAddrFromCoord( 298 const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn, 299 ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut) const 300 { 301 return ADDR_NOTSUPPORTED; 302 } 303 304 /// Virtual function to get htile address for tc compatible htile HwlComputeHtileAddrFromCoord(const ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT * pIn,ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT * pOut)305 virtual ADDR_E_RETURNCODE HwlComputeHtileAddrFromCoord( 306 const ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn, 307 ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut) const 308 { 309 return ADDR_NOTSUPPORTED; 310 } 311 312 // Compute attributes 313 314 // HTILE 315 UINT_32 ComputeHtileInfo( 316 ADDR_HTILE_FLAGS flags, 317 UINT_32 pitchIn, UINT_32 heightIn, UINT_32 numSlices, 318 BOOL_32 isLinear, BOOL_32 isWidth8, BOOL_32 isHeight8, 319 ADDR_TILEINFO* pTileInfo, 320 UINT_32* pPitchOut, UINT_32* pHeightOut, UINT_64* pHtileBytes, 321 UINT_32* pMacroWidth = NULL, UINT_32* pMacroHeight = NULL, 322 UINT_64* pSliceSize = NULL, UINT_32* pBaseAlign = NULL) const; 323 324 // CMASK 325 ADDR_E_RETURNCODE ComputeCmaskInfo( 326 ADDR_CMASK_FLAGS flags, 327 UINT_32 pitchIn, UINT_32 heightIn, UINT_32 numSlices, BOOL_32 isLinear, 328 ADDR_TILEINFO* pTileInfo, UINT_32* pPitchOut, UINT_32* pHeightOut, UINT_64* pCmaskBytes, 329 UINT_32* pMacroWidth, UINT_32* pMacroHeight, UINT_64* pSliceSize = NULL, 330 UINT_32* pBaseAlign = NULL, UINT_32* pBlockMax = NULL) const; 331 332 virtual VOID HwlComputeTileDataWidthAndHeightLinear( 333 UINT_32* pMacroWidth, UINT_32* pMacroHeight, 334 UINT_32 bpp, ADDR_TILEINFO* pTileInfo) const; 335 336 // CMASK & HTILE addressing 337 virtual UINT_64 HwlComputeXmaskAddrFromCoord( 338 UINT_32 pitch, UINT_32 height, UINT_32 x, UINT_32 y, UINT_32 slice, 339 UINT_32 numSlices, UINT_32 factor, BOOL_32 isLinear, BOOL_32 isWidth8, 340 BOOL_32 isHeight8, ADDR_TILEINFO* pTileInfo, 341 UINT_32* bitPosition) const; 342 343 virtual VOID HwlComputeXmaskCoordFromAddr( 344 UINT_64 addr, UINT_32 bitPosition, UINT_32 pitch, UINT_32 height, UINT_32 numSlices, 345 UINT_32 factor, BOOL_32 isLinear, BOOL_32 isWidth8, BOOL_32 isHeight8, 346 ADDR_TILEINFO* pTileInfo, UINT_32* pX, UINT_32* pY, UINT_32* pSlice) const; 347 348 // Surface mipmap 349 VOID ComputeMipLevel( 350 ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn) const; 351 352 /// Pure Virtual function for Hwl to get macro tiled alignment info 353 virtual BOOL_32 HwlGetAlignmentInfoMacroTiled( 354 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, 355 UINT_32* pPitchAlign, UINT_32* pHeightAlign, UINT_32* pSizeAlign) const = 0; 356 357 HwlOverrideTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT * pInOut)358 virtual VOID HwlOverrideTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const 359 { 360 // not supported in hwl layer 361 } 362 HwlOptimizeTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT * pInOut)363 virtual VOID HwlOptimizeTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const 364 { 365 // not supported in hwl layer 366 } 367 HwlSelectTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT * pInOut)368 virtual VOID HwlSelectTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const 369 { 370 // not supported in hwl layer 371 } 372 373 AddrTileMode DegradeLargeThickTile(AddrTileMode tileMode, UINT_32 bpp) const; 374 375 VOID PadDimensions( 376 AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, 377 UINT_32 numSamples, ADDR_TILEINFO* pTileInfo, UINT_32 padDims, UINT_32 mipLevel, 378 UINT_32* pPitch, UINT_32* pPitchAlign, UINT_32* pHeight, UINT_32 heightAlign, 379 UINT_32* pSlices, UINT_32 sliceAlign) const; 380 HwlPadDimensions(AddrTileMode tileMode,UINT_32 bpp,ADDR_SURFACE_FLAGS flags,UINT_32 numSamples,ADDR_TILEINFO * pTileInfo,UINT_32 mipLevel,UINT_32 * pPitch,UINT_32 * pPitchAlign,UINT_32 height,UINT_32 heightAlign)381 virtual VOID HwlPadDimensions( 382 AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, 383 UINT_32 numSamples, ADDR_TILEINFO* pTileInfo, UINT_32 mipLevel, 384 UINT_32* pPitch, UINT_32* pPitchAlign, UINT_32 height, UINT_32 heightAlign) const 385 { 386 } 387 388 // 389 // Addressing shared for linear/1D tiling 390 // 391 UINT_64 ComputeSurfaceAddrFromCoordLinear( 392 UINT_32 x, UINT_32 y, UINT_32 slice, UINT_32 sample, 393 UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSlices, 394 UINT_32* pBitPosition) const; 395 396 VOID ComputeSurfaceCoordFromAddrLinear( 397 UINT_64 addr, UINT_32 bitPosition, UINT_32 bpp, 398 UINT_32 pitch, UINT_32 height, UINT_32 numSlices, 399 UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample) const; 400 401 VOID ComputeSurfaceCoordFromAddrMicroTiled( 402 UINT_64 addr, UINT_32 bitPosition, 403 UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSamples, 404 AddrTileMode tileMode, UINT_32 tileBase, UINT_32 compBits, 405 UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample, 406 AddrTileType microTileType, BOOL_32 isDepthSampleOrder) const; 407 408 ADDR_E_RETURNCODE ComputeMicroTileEquation( 409 UINT_32 bpp, AddrTileMode tileMode, 410 AddrTileType microTileType, ADDR_EQUATION* pEquation) const; 411 412 UINT_32 ComputePixelIndexWithinMicroTile( 413 UINT_32 x, UINT_32 y, UINT_32 z, 414 UINT_32 bpp, AddrTileMode tileMode, AddrTileType microTileType) const; 415 416 /// Pure Virtual function for Hwl computing coord from offset inside micro tile 417 virtual VOID HwlComputePixelCoordFromOffset( 418 UINT_32 offset, UINT_32 bpp, UINT_32 numSamples, 419 AddrTileMode tileMode, UINT_32 tileBase, UINT_32 compBits, 420 UINT_32* pX, UINT_32* pY, UINT_32* pSlice, UINT_32* pSample, 421 AddrTileType microTileType, BOOL_32 isDepthSampleOrder) const = 0; 422 423 // 424 // Addressing shared by all 425 // 426 virtual UINT_32 HwlGetPipes( 427 const ADDR_TILEINFO* pTileInfo) const; 428 429 UINT_32 ComputePipeFromAddr( 430 UINT_64 addr, UINT_32 numPipes) const; 431 ComputePipeEquation(UINT_32 log2BytesPP,UINT_32 threshX,UINT_32 threshY,ADDR_TILEINFO * pTileInfo,ADDR_EQUATION * pEquation)432 virtual ADDR_E_RETURNCODE ComputePipeEquation( 433 UINT_32 log2BytesPP, UINT_32 threshX, UINT_32 threshY, ADDR_TILEINFO* pTileInfo, ADDR_EQUATION* pEquation) const 434 { 435 return ADDR_NOTSUPPORTED; 436 } 437 438 /// Pure Virtual function for Hwl computing pipe from coord 439 virtual UINT_32 ComputePipeFromCoord( 440 UINT_32 x, UINT_32 y, UINT_32 slice, AddrTileMode tileMode, 441 UINT_32 pipeSwizzle, BOOL_32 flags, ADDR_TILEINFO* pTileInfo) const = 0; 442 443 /// Pure Virtual function for Hwl computing coord Y for 8 pipe cmask/htile 444 virtual UINT_32 HwlComputeXmaskCoordYFrom8Pipe( 445 UINT_32 pipe, UINT_32 x) const = 0; 446 447 // 448 // Misc helper 449 // 450 static const TileModeFlags ModeFlags[ADDR_TM_COUNT]; 451 452 static UINT_32 Thickness( 453 AddrTileMode tileMode); 454 455 // Checking tile mode 456 static BOOL_32 IsMacroTiled(AddrTileMode tileMode); 457 static BOOL_32 IsMacro3dTiled(AddrTileMode tileMode); 458 static BOOL_32 IsLinear(AddrTileMode tileMode); 459 static BOOL_32 IsMicroTiled(AddrTileMode tileMode); 460 static BOOL_32 IsPrtTileMode(AddrTileMode tileMode); 461 static BOOL_32 IsPrtNoRotationTileMode(AddrTileMode tileMode); 462 463 /// Return TRUE if tile info is needed UseTileInfo()464 BOOL_32 UseTileInfo() const 465 { 466 return !m_configFlags.ignoreTileInfo; 467 } 468 469 /// Adjusts pitch alignment for flipping surface 470 VOID AdjustPitchAlignment( 471 ADDR_SURFACE_FLAGS flags, UINT_32* pPitchAlign) const; 472 473 /// Overwrite tile config according to tile index 474 virtual ADDR_E_RETURNCODE HwlSetupTileCfg( 475 UINT_32 bpp, INT_32 index, INT_32 macroModeIndex, 476 ADDR_TILEINFO* pInfo, AddrTileMode* mode = NULL, AddrTileType* type = NULL) const; 477 478 /// Overwrite macro tile config according to tile index 479 virtual INT_32 HwlComputeMacroModeIndex( 480 INT_32 index, ADDR_SURFACE_FLAGS flags, UINT_32 bpp, UINT_32 numSamples, 481 ADDR_TILEINFO* pTileInfo, AddrTileMode *pTileMode = NULL, AddrTileType *pTileType = NULL 482 ) const 483 { 484 return TileIndexNoMacroIndex; 485 } 486 487 /// Pre-handler of 3x pitch (96 bit) adjustment 488 virtual UINT_32 HwlPreHandleBaseLvl3xPitch( 489 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, UINT_32 expPitch) const; 490 /// Post-handler of 3x pitch adjustment 491 virtual UINT_32 HwlPostHandleBaseLvl3xPitch( 492 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, UINT_32 expPitch) const; 493 /// Check miplevel after surface adjustment 494 ADDR_E_RETURNCODE PostComputeMipLevel( 495 ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, 496 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; 497 498 /// Quad buffer stereo support, has its implementation in ind. layer 499 VOID ComputeQbStereoInfo( 500 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const; 501 502 /// Pure virutual function to compute stereo bank swizzle for right eye 503 virtual UINT_32 HwlComputeQbStereoRightSwizzle( 504 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const = 0; 505 506 VOID OptimizeTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const; 507 508 /// Overwrite tile setting to PRT HwlSetPrtTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT * pInOut)509 virtual VOID HwlSetPrtTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const 510 { 511 } 512 513 static BOOL_32 DegradeTo1D( 514 UINT_32 width, UINT_32 height, 515 UINT_32 macroTilePitchAlign, UINT_32 macroTileHeightAlign); 516 517 private: 518 // Disallow the copy constructor 519 Lib(const Lib& a); 520 521 // Disallow the assignment operator 522 Lib& operator=(const Lib& a); 523 524 UINT_32 ComputeCmaskBaseAlign( 525 ADDR_CMASK_FLAGS flags, ADDR_TILEINFO* pTileInfo) const; 526 527 UINT_64 ComputeCmaskBytes( 528 UINT_32 pitch, UINT_32 height, UINT_32 numSlices) const; 529 530 // 531 // CMASK/HTILE shared methods 532 // 533 VOID ComputeTileDataWidthAndHeight( 534 UINT_32 bpp, UINT_32 cacheBits, ADDR_TILEINFO* pTileInfo, 535 UINT_32* pMacroWidth, UINT_32* pMacroHeight) const; 536 537 UINT_32 ComputeXmaskCoordYFromPipe( 538 UINT_32 pipe, UINT_32 x) const; 539 }; 540 541 } // V1 542 } // Addr 543 544 #endif 545 546