Searched refs:ADDR_TM_1D_TILED_THIN1 (Results 1 – 6 of 6) sorted by relevance
750 localIn.tileMode = ADDR_TM_1D_TILED_THIN1; in HwlComputeSurfaceInfo()1058 tileMode = ADDR_TM_1D_TILED_THIN1; in HwlOverrideTileMode()1371 case ADDR_TM_1D_TILED_THIN1: in HwlSetupTileInfo()1387 case ADDR_TM_1D_TILED_THIN1: in HwlSetupTileInfo()1406 case ADDR_TM_1D_TILED_THIN1: in HwlSetupTileInfo()1458 case ADDR_TM_1D_TILED_THIN1: in HwlSetupTileInfo()
176 case ADDR_TM_1D_TILED_THIN1://fall through in DispatchComputeSurfaceInfo()615 return ComputeSurfaceInfoMicroTiled(pIn, pOut, padDims, ADDR_TM_1D_TILED_THIN1); in ComputeSurfaceInfoMacroTiled()1142 expTileMode = ADDR_TM_1D_TILED_THIN1; in ComputeSurfaceMipLevelTileMode()1251 expTileMode = ADDR_TM_1D_TILED_THIN1; in HwlDegradeThickTileMode()1374 case ADDR_TM_1D_TILED_THIN1://fall through in DispatchComputeSurfaceAddrFromCoord()2236 case ADDR_TM_1D_TILED_THIN1://fall through in DispatchComputeSurfaceCoordFromAddr()
3312 tileMode = ADDR_TM_1D_TILED_THIN1; in HwlOptimizeTileMode()
175 ADDR_TM_1D_TILED_THIN1 = 2, ///< Linear array of 8x8 tiles enumerator
3653 ADDR_TM_1D_TILED_THIN1 : ADDR_TM_1D_TILED_THICK; in OptimizeTileMode()3699 ADDR_TM_1D_TILED_THIN1 : ADDR_TM_1D_TILED_THICK; in OptimizeTileMode()3717 ADDR_TM_1D_TILED_THIN1 : ADDR_TM_1D_TILED_THICK; in OptimizeTileMode()3733 pInOut->tileMode = ADDR_TM_1D_TILED_THIN1; in OptimizeTileMode()
315 case ADDR_TM_1D_TILED_THIN1: in gfx6_compute_level()523 AddrSurfInfoIn.tileMode = ADDR_TM_1D_TILED_THIN1; in gfx6_compute_surface()