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Searched refs:ADDR_TM_3D_TILED_THIN1 (Results 1 – 5 of 5) sorted by relevance

/external/mesa3d/src/amd/addrlib/r800/
Degbaddrlib.cpp183 case ADDR_TM_3D_TILED_THIN1: //fall through in DispatchComputeSurfaceInfo()
1133 case ADDR_TM_3D_TILED_THIN1: in ComputeSurfaceMipLevelTileMode()
1259 expTileMode = ADDR_TM_3D_TILED_THIN1; in HwlDegradeThickTileMode()
1277 expTileMode = ADDR_TM_3D_TILED_THIN1; in HwlDegradeThickTileMode()
1391 case ADDR_TM_3D_TILED_THIN1: //fall through in DispatchComputeSurfaceAddrFromCoord()
2256 case ADDR_TM_3D_TILED_THIN1: //fall through in DispatchComputeSurfaceCoordFromAddr()
2516 case ADDR_TM_3D_TILED_THIN1: //fall through in ComputeSurfaceCoord2DFromBankPipe()
3031 case ADDR_TM_3D_TILED_THIN1: // fall through in ComputeBankFromCoord()
3053 case ADDR_TM_3D_TILED_THIN1: //fall through in ComputeBankFromCoord()
3126 case ADDR_TM_3D_TILED_THIN1: //fall through in ComputePipeRotation()
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Dciaddrlib.cpp796 tileMode == ADDR_TM_3D_TILED_THIN1 || in HwlComputeFmaskInfo()
802 ADDR_ASSERT(m_tileTable[15].mode == ADDR_TM_3D_TILED_THIN1); in HwlComputeFmaskInfo()
1068 tileMode = ADDR_TM_3D_TILED_THIN1; in HwlOverrideTileMode()
1290 else if (tileMode == ADDR_TM_3D_TILED_THIN1 || tileMode == ADDR_TM_PRT_3D_TILED_THIN1) in HwlSetupTileInfo()
1412 case ADDR_TM_3D_TILED_THIN1: in HwlSetupTileInfo()
Dsiaddrlib.cpp766 case ADDR_TM_3D_TILED_THIN1: //fall through thin in ComputePipeFromCoord()
3794 (tileConfig.mode == ADDR_TM_3D_TILED_THIN1) || in IsEquationSupported()
/external/mesa3d/src/amd/addrlib/
Daddrtypes.h185 ADDR_TM_3D_TILED_THIN1 = 12, ///< Macro tiling w/ pipe rotation between slices enumerator
/external/mesa3d/src/amd/addrlib/core/
Daddrlib1.cpp3794 tileMode = ADDR_TM_3D_TILED_THIN1; in DegradeLargeThickTile()