Home
last modified time | relevance | path

Searched refs:ADDU (Results 1 – 25 of 25) sorted by relevance

/external/python/cpython2/Modules/_ctypes/libffi/src/mips/
Dn32.S78 ADDU t4, v0, 2 * FFI_SIZEOF_ARG -1 # make sure it is aligned
86 ADDU a3, $fp, 3 * FFI_SIZEOF_ARG
104 ADDU t9, t9, t8
346 ADDU $sp, SIZEOF_FRAME # Fix stack pointer
445 ADDU a1, $sp, V0_OFF2
446 ADDU a2, $sp, A0_OFF2
447 ADDU a3, $sp, F12_OFF2
512 ADDU $sp, SIZEOF_FRAME2
Do32.S68 ADDU v0, bytes, 7 # make sure it is aligned
75 ADDU a0, $sp, 4 * FFI_SIZEOF_ARG
83 ADDU $sp, 4 * FFI_SIZEOF_ARG # adjust $sp to new args
179 ADDU $sp, SIZEOF_FRAME # Fix stack pointer
301 ADDU $sp, SIZEOF_FRAME2
Dffitarget.h151 # define ADDU addu macro
158 # define ADDU daddu macro
/external/libffi/src/mips/
Dn32.S78 ADDU t4, v0, 2 * FFI_SIZEOF_ARG -1 # make sure it is aligned
86 ADDU a3, $fp, 3 * FFI_SIZEOF_ARG
104 ADDU t9, t9, t8
346 ADDU $sp, SIZEOF_FRAME # Fix stack pointer
445 ADDU a1, $sp, V0_OFF2
446 ADDU a2, $sp, A0_OFF2
447 ADDU a3, $sp, F12_OFF2
512 ADDU $sp, SIZEOF_FRAME2
Do32.S68 ADDU v0, bytes, 7 # make sure it is aligned
75 ADDU a0, $sp, 4 * FFI_SIZEOF_ARG
83 ADDU $sp, 4 * FFI_SIZEOF_ARG # adjust $sp to new args
179 ADDU $sp, SIZEOF_FRAME # Fix stack pointer
301 ADDU $sp, SIZEOF_FRAME2
Dffitarget.h151 # define ADDU addu macro
158 # define ADDU daddu macro
/external/pcre/dist2/src/sljit/
DsljitNativeMIPS_32.c81 return push_inst(compiler, ADDU | S(src2) | TA(0) | D(dst), DR(dst)); in emit_single_op()
143 FAIL_IF(push_inst(compiler, ADDU | S(src2) | TA(0) | D(TMP_REG1), DR(TMP_REG1))); in emit_single_op()
185 FAIL_IF(push_inst(compiler, ADDU | S(src1) | T(src2) | DA(EQUAL_FLAG), EQUAL_FLAG)); in emit_single_op()
191 FAIL_IF(push_inst(compiler, ADDU | S(src1) | T(src2) | D(dst), DR(dst))); in emit_single_op()
203 FAIL_IF(push_inst(compiler, ADDU | S(dst) | TA(0) | DA(EQUAL_FLAG), EQUAL_FLAG)); in emit_single_op()
223 FAIL_IF(push_inst(compiler, ADDU | S(src1) | T(src2) | D(dst), DR(dst))); in emit_single_op()
228 FAIL_IF(push_inst(compiler, ADDU | S(dst) | TA(OTHER_FLAG) | D(dst), DR(dst))); in emit_single_op()
336 FAIL_IF(push_inst(compiler, ADDU | S(dst) | TA(0) | DA(EQUAL_FLAG), EQUAL_FLAG)); in emit_single_op()
517 ins = ADDU | S(word_arg_count) | TA(0) | DA(4 + (offsets[arg_count - 1] >> 2)); in call_with_args()
519 ins = ADDU | S(SLJIT_R0) | TA(0) | DA(4); in call_with_args()
[all …]
DsljitNativeMIPS_64.c171 return push_inst(compiler, SELECT_OP(DADDU, ADDU) | S(src2) | TA(0) | D(dst), DR(dst)); in emit_single_op()
234 …FAIL_IF(push_inst(compiler, SELECT_OP(DADDU, ADDU) | S(src2) | TA(0) | D(TMP_REG1), DR(TMP_REG1))); in emit_single_op()
276 …FAIL_IF(push_inst(compiler, SELECT_OP(DADDU, ADDU) | S(src1) | T(src2) | DA(EQUAL_FLAG), EQUAL_FLA… in emit_single_op()
282 FAIL_IF(push_inst(compiler, SELECT_OP(DADDU, ADDU) | S(src1) | T(src2) | D(dst), DR(dst))); in emit_single_op()
294 …FAIL_IF(push_inst(compiler, SELECT_OP(DADDU, ADDU) | S(dst) | TA(0) | DA(EQUAL_FLAG), EQUAL_FLAG)); in emit_single_op()
314 FAIL_IF(push_inst(compiler, SELECT_OP(DADDU, ADDU) | S(src1) | T(src2) | D(dst), DR(dst))); in emit_single_op()
319 FAIL_IF(push_inst(compiler, SELECT_OP(DADDU, ADDU) | S(dst) | TA(OTHER_FLAG) | D(dst), DR(dst))); in emit_single_op()
427 …FAIL_IF(push_inst(compiler, SELECT_OP(DADDU, ADDU) | S(dst) | TA(0) | DA(EQUAL_FLAG), EQUAL_FLAG)); in emit_single_op()
DsljitNativeMIPS_common.c112 #define ADDU (HI(0) | LO(33)) macro
206 #define ADDU_W ADDU
/external/llvm/lib/Target/Mips/
DMipsSEInstrInfo.cpp710 unsigned ADDU = ABI.GetPtrAdduOp(); in expandEhReturn() local
723 BuildMI(MBB, I, I->getDebugLoc(), get(ADDU), T9) in expandEhReturn()
726 BuildMI(MBB, I, I->getDebugLoc(), get(ADDU), RA) in expandEhReturn()
729 BuildMI(MBB, I, I->getDebugLoc(), get(ADDU), SP).addReg(SP).addReg(OffsetReg); in expandEhReturn()
DMipsDSPInstrFormats.td65 // ADDU.QB sub-class format.
DMips16InstrInfo.td573 // Format: ADDU rz, rx, ry MIPS16e
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMipsSEInstrInfo.cpp875 unsigned ADDU = ABI.GetPtrAdduOp(); in expandEhReturn() local
888 BuildMI(MBB, I, I->getDebugLoc(), get(ADDU), T9) in expandEhReturn()
891 BuildMI(MBB, I, I->getDebugLoc(), get(ADDU), RA) in expandEhReturn()
894 BuildMI(MBB, I, I->getDebugLoc(), get(ADDU), SP).addReg(SP).addReg(OffsetReg); in expandEhReturn()
DMipsDSPInstrFormats.td65 // ADDU.QB sub-class format.
DMips16InstrInfo.td573 // Format: ADDU rz, rx, ry MIPS16e
/external/v8/src/mips/
Dconstants-mips.h526 ADDU = ((4U << 3) + 1), enumerator
1289 FunctionFieldToBitNumber(ADD) | FunctionFieldToBitNumber(ADDU) |
Ddisasm-mips.cc1398 case ADDU: in DecodeTypeRegisterSPECIAL()
Dassembler-mips.cc1905 GenInstrRegister(SPECIAL, rs, rt, rd, 0, ADDU); in addu()
Dsimulator-mips.cc3995 case ADDU: in DecodeTypeRegisterSPECIAL()
/external/v8/src/mips64/
Dconstants-mips64.h518 ADDU = ((4U << 3) + 1), enumerator
1334 FunctionFieldToBitNumber(ADDU) | FunctionFieldToBitNumber(DADDU) |
Ddisasm-mips64.cc1627 case ADDU: in DecodeTypeRegisterSPECIAL()
Dassembler-mips64.cc1897 GenInstrRegister(SPECIAL, rs, rt, rd, 0, ADDU); in addu()
Dsimulator-mips64.cc4019 case ADDU: { in DecodeTypeRegisterSPECIAL()
/external/python/cpython2/Modules/_ctypes/libffi/
DChangeLog.libffi-3.12786 * src/mips/n32.S (ffi_call_N32): Replace dadd with ADDU, dsub with
2787 SUBU, add with ADDU and use smaller code sequences.
2977 * src/mips/ffitarget.h (REG_L, REG_S, SUBU, ADDU, SRL, LI): Indent.
/external/libffi/
DChangeLog.libffi-3.12786 * src/mips/n32.S (ffi_call_N32): Replace dadd with ADDU, dsub with
2787 SUBU, add with ADDU and use smaller code sequences.
2977 * src/mips/ffitarget.h (REG_L, REG_S, SUBU, ADDU, SRL, LI): Indent.