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Searched refs:ADDVI_H (Results 1 – 11 of 11) sorted by relevance

/external/webp/src/dsp/
Dmsa_macro.h26 #define ADDVI_H(a, b) __msa_addvi_h((v8i16)a, b) macro
37 #define ADDVI_H(a, b) (a + b) macro
1133 out0 = (RTYPE)ADDVI_H(in0, in1); \
1134 out1 = (RTYPE)ADDVI_H(in2, in3); \
/external/capstone/arch/Mips/
DMipsGenAsmWriter.inc70 570445735U, // ADDVI_H
1784 0U, // ADDVI_H
4818 // ADDVI_B, ADDVI_D, ADDVI_H, ADDVI_W, ANDI_B, BCLRI_B, BCLRI_D, BCLRI_H,...
DMipsGenDisassemblerTables.inc1362 /* 3954 */ MCD_OPC_Decode, 53, 100, // Opcode: ADDVI_H
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/
DMipsGenAsmWriter.inc1799 268456427U, // ADDVI_H
4430 4U, // ADDVI_H
6962 // ADDVI_B, ADDVI_D, ADDVI_H, ADDVI_W, APPEND, APPEND_MMR2, BCLRI_W, BNEG...
DMipsGenMCCodeEmitter.inc584 UINT64_C(2015363078), // ADDVI_H
3709 case Mips::ADDVI_H:
8310 Feature_HasStdEnc | Feature_HasMSA | 0, // ADDVI_H = 571
DMipsGenDAGISel.inc16364 /* 30018*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDVI_H), 0,
16367 … // Dst: (ADDVI_H:{ *:[v8i16] } MSA128HOpnd:{ *:[v8i16] }:$ws, vsplati16_uimm5:{ *:[v8i16] }:$imm)
16370 /* 30030*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDVI_H), 0,
16373 … // Dst: (ADDVI_H:{ *:[v8i16] } MSA128HOpnd:{ *:[v8i16] }:$ws, vsplati16_uimm5:{ *:[v8i16] }:$imm)
DMipsGenInstrInfo.inc586 ADDVI_H = 571,
4631 …, 3, 1, 4, 520, 0, 0x6ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #571 = ADDVI_H
DMipsGenDisassemblerTables.inc3826 /* 5313 */ MCD::OPC_Decode, 187, 4, 236, 1, // Opcode: ADDVI_H
DMipsGenAsmMatcher.inc5164 …{ 437 /* addvi.h */, Mips::ADDVI_H, Convert__MSA128AsmReg1_0__MSA128AsmReg1_1__ConstantUImm5_01_2,…
/external/llvm/lib/Target/Mips/
DMipsMSAInstrInfo.td2738 def ADDVI_H : ADDVI_H_ENC, ADDVI_H_DESC;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMipsMSAInstrInfo.td2745 def ADDVI_H : ADDVI_H_ENC, ADDVI_H_DESC;