Searched refs:ADDVI_W (Results 1 – 11 of 11) sorted by relevance
/external/webp/src/dsp/ |
D | msa_macro.h | 27 #define ADDVI_W(a, b) __msa_addvi_w((v4i32)a, b) macro 38 #define ADDVI_W(a, b) (a + b) macro 1146 out0 = (RTYPE)ADDVI_W(in0, in1); \ 1147 out1 = (RTYPE)ADDVI_W(in2, in3); \
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/external/capstone/arch/Mips/ |
D | MipsGenAsmWriter.inc | 71 570449319U, // ADDVI_W 1785 0U, // ADDVI_W 4818 // ADDVI_B, ADDVI_D, ADDVI_H, ADDVI_W, ANDI_B, BCLRI_B, BCLRI_D, BCLRI_H,...
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D | MipsGenDisassemblerTables.inc | 1365 /* 3965 */ MCD_OPC_Decode, 54, 101, // Opcode: ADDVI_W
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/ |
D | MipsGenAsmWriter.inc | 1800 268460310U, // ADDVI_W 4431 4U, // ADDVI_W 6962 // ADDVI_B, ADDVI_D, ADDVI_H, ADDVI_W, APPEND, APPEND_MMR2, BCLRI_W, BNEG...
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D | MipsGenMCCodeEmitter.inc | 585 UINT64_C(2017460230), // ADDVI_W 3710 case Mips::ADDVI_W: 8311 Feature_HasStdEnc | Feature_HasMSA | 0, // ADDVI_W = 572
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D | MipsGenDAGISel.inc | 16380 /* 30049*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDVI_W), 0, 16383 … // Dst: (ADDVI_W:{ *:[v4i32] } MSA128WOpnd:{ *:[v4i32] }:$ws, vsplati32_uimm5:{ *:[v4i32] }:$imm) 16386 /* 30061*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::ADDVI_W), 0, 16389 … // Dst: (ADDVI_W:{ *:[v4i32] } MSA128WOpnd:{ *:[v4i32] }:$ws, vsplati32_uimm5:{ *:[v4i32] }:$imm)
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D | MipsGenInstrInfo.inc | 587 ADDVI_W = 572, 4632 …, 3, 1, 4, 520, 0, 0x6ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #572 = ADDVI_W
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D | MipsGenDisassemblerTables.inc | 3829 /* 5328 */ MCD::OPC_Decode, 188, 4, 237, 1, // Opcode: ADDVI_W
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D | MipsGenAsmMatcher.inc | 5165 …{ 445 /* addvi.w */, Mips::ADDVI_W, Convert__MSA128AsmReg1_0__MSA128AsmReg1_1__ConstantUImm5_01_2,…
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/external/llvm/lib/Target/Mips/ |
D | MipsMSAInstrInfo.td | 2739 def ADDVI_W : ADDVI_W_ENC, ADDVI_W_DESC;
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
D | MipsMSAInstrInfo.td | 2746 def ADDVI_W : ADDVI_W_ENC, ADDVI_W_DESC;
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