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Searched refs:ADLL_CFG0_PHY_REG (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/drivers/ddr/marvell/a38x/
Dmv_ddr_regs.h409 #define ADLL_CFG0_PHY_REG 0x92 macro
Dddr3_training.c1209 DDR_PHY_DATA, ADLL_CFG0_PHY_REG, in adll_calibration()
1220 DDR_PHY_CONTROL, ADLL_CFG0_PHY_REG, in adll_calibration()