Home
last modified time | relevance | path

Searched refs:AIPS2_BASE_ADDR (Results 1 – 8 of 8) sorted by relevance

/external/u-boot/arch/arm/include/asm/arch-mx5/
Dimx-regs.h17 #define AIPS2_BASE_ADDR 0x83F00000 macro
27 #define AIPS2_BASE_ADDR 0x63F00000 macro
90 #define PLL1_BASE_ADDR (AIPS2_BASE_ADDR + 0x00080000)
91 #define PLL2_BASE_ADDR (AIPS2_BASE_ADDR + 0x00084000)
92 #define PLL3_BASE_ADDR (AIPS2_BASE_ADDR + 0x00088000)
94 #define PLL4_BASE_ADDR (AIPS2_BASE_ADDR + 0x0008c000)
96 #define AHBMAX_BASE_ADDR (AIPS2_BASE_ADDR + 0x00094000)
97 #define IIM_BASE_ADDR (AIPS2_BASE_ADDR + 0x00098000)
98 #define CSU_BASE_ADDR (AIPS2_BASE_ADDR + 0x0009C000)
99 #define ARM_BASE_ADDR (AIPS2_BASE_ADDR + 0x000A0000)
[all …]
/external/u-boot/arch/arm/include/asm/arch-mx35/
Dimx-regs.h51 #define AIPS2_BASE_ADDR 0x53F00000 macro
52 #define AIPS2_CTRL_BASE_ADDR AIPS2_BASE_ADDR
Dlowlevel_macro.S27 ldr r2, =AIPS2_BASE_ADDR
/external/u-boot/arch/arm/mach-imx/
Dinit.c18 aips2 = (struct aipstz_regs *)AIPS2_BASE_ADDR; in init_aips()
/external/u-boot/arch/arm/include/asm/arch-mx8m/
Dimx-regs.h51 #define AIPS2_BASE_ADDR 0x305F0000 macro
/external/u-boot/arch/arm/mach-imx/mx5/
Dlowlevel_init.S66 ldr r0, =AIPS2_BASE_ADDR
/external/u-boot/arch/arm/include/asm/arch-mx6/
Dimx-regs.h135 #define AIPS2_BASE_ADDR AIPS2_ON_BASE_ADDR macro
/external/u-boot/arch/arm/include/asm/arch-mx7/
Dimx-regs.h202 #define AIPS2_BASE_ADDR AIPS2_ON_BASE_ADDR macro