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Searched refs:AIPS2_OFF_BASE_ADDR (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/include/asm/arch-mx6/
Dimx-regs.h231 #define AIPS2_OFF_BASE_ADDR (ATZ2_BASE_ADDR + 0x80000) macro
249 #define USB_PL301_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x0000)
250 #define USB_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x4000)
252 #define ENET_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x8000)
254 #define MSHC_IPS_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0xC000)
256 #define MLB_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0xC000)
259 #define USDHC1_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x10000)
260 #define USDHC2_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x14000)
261 #define USDHC3_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x18000)
262 #define USDHC4_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x1C000)
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/external/u-boot/arch/arm/include/asm/arch-mx7/
Dimx-regs.h125 #define AIPS2_OFF_BASE_ADDR (AIPS_TZ2_BASE_ADDR+0x200000) macro
126 #define ADC1_IPS_BASE_ADDR (AIPS2_OFF_BASE_ADDR+0x10000)
127 #define ADC2_IPS_BASE_ADDR (AIPS2_OFF_BASE_ADDR+0x20000)
128 #define ECSPI4_BASE_ADDR (AIPS2_OFF_BASE_ADDR+0x30000)
129 #define FTM1_IPS_BASE_ADDR (AIPS2_OFF_BASE_ADDR+0x40000)
130 #define FTM2_IPS_BASE_ADDR (AIPS2_OFF_BASE_ADDR+0x50000)
131 #define PWM1_IPS_BASE_ADDR (AIPS2_OFF_BASE_ADDR+0x60000)
132 #define PWM2_IPS_BASE_ADDR (AIPS2_OFF_BASE_ADDR+0x70000)
133 #define PWM3_IPS_BASE_ADDR (AIPS2_OFF_BASE_ADDR+0x80000)
134 #define PWM4_IPS_BASE_ADDR (AIPS2_OFF_BASE_ADDR+0x90000)
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