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Searched refs:ALLOC_STATE_IDX (Results 1 – 1 of 1) sorted by relevance

/external/mesa3d/src/mesa/drivers/dri/radeon/
Dradeon_state_init.c519 #define ALLOC_STATE_IDX( ATOM, CHK, SZ, NM, FLAG, IDX ) \ in radeonInitState() macro
533 ALLOC_STATE_IDX(ATOM, CHK, SZ, NM, FLAG, 0) in radeonInitState()
552 ALLOC_STATE_IDX( tex[0], tex0_mm, TEX_STATE_SIZE, "TEX/tex-0", 0, 0); in radeonInitState()
553 ALLOC_STATE_IDX( tex[1], tex1_mm, TEX_STATE_SIZE, "TEX/tex-1", 0, 1); in radeonInitState()
554 ALLOC_STATE_IDX( tex[2], tex2_mm, TEX_STATE_SIZE, "TEX/tex-2", 0, 2); in radeonInitState()
580 ALLOC_STATE_IDX( cube[0], cube0_mm, CUBE_STATE_SIZE, "CUBE/cube-0", 0, 0 ); in radeonInitState()
581 ALLOC_STATE_IDX( cube[1], cube1_mm, CUBE_STATE_SIZE, "CUBE/cube-1", 0, 1 ); in radeonInitState()
582 ALLOC_STATE_IDX( cube[2], cube2_mm, CUBE_STATE_SIZE, "CUBE/cube-2", 0, 2 ); in radeonInitState()
586 ALLOC_STATE_IDX( txr[0], txr0, TXR_STATE_SIZE, "TXR/txr-0", 0, 0 ); in radeonInitState()
587 ALLOC_STATE_IDX( txr[1], txr1, TXR_STATE_SIZE, "TXR/txr-1", 0, 1 ); in radeonInitState()
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