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Searched refs:AMDGPURegisterInfo (Results 1 – 23 of 23) sorted by relevance

/external/llvm/lib/Target/AMDGPU/
DAMDGPURegisterInfo.cpp20 AMDGPURegisterInfo::AMDGPURegisterInfo() : AMDGPUGenRegisterInfo(0) {} in AMDGPURegisterInfo() function in AMDGPURegisterInfo
30 const MCPhysReg *AMDGPURegisterInfo::getCalleeSavedRegs( in getCalleeSavedRegs()
35 unsigned AMDGPURegisterInfo::getFrameRegister(const MachineFunction &MF) const { in getFrameRegister()
39 unsigned AMDGPURegisterInfo::getSubRegFromChannel(unsigned Channel) const { in getSubRegFromChannel()
DAMDGPURegisterInfo.h30 struct AMDGPURegisterInfo : public AMDGPUGenRegisterInfo { struct
31 AMDGPURegisterInfo();
DR600RegisterInfo.h24 struct R600RegisterInfo final : public AMDGPURegisterInfo {
DAMDGPUSubtarget.h122 const AMDGPURegisterInfo *getRegisterInfo() const override;
453 inline const AMDGPURegisterInfo *AMDGPUSubtarget::getRegisterInfo() const { in getRegisterInfo()
DAMDGPURegisterInfo.td1 //===-- AMDGPURegisterInfo.td - AMDGPU register info -------*- tablegen -*-===//
DAMDGPUFrameLowering.cpp79 const AMDGPURegisterInfo *RI in getFrameIndexReference()
DR600RegisterInfo.cpp23 R600RegisterInfo::R600RegisterInfo() : AMDGPURegisterInfo() { in R600RegisterInfo()
DCMakeLists.txt50 AMDGPURegisterInfo.cpp
DSIRegisterInfo.h26 struct SIRegisterInfo final : public AMDGPURegisterInfo {
DAMDGPU.td402 include "AMDGPURegisterInfo.td"
DSIRegisterInfo.cpp93 SIRegisterInfo::SIRegisterInfo() : AMDGPURegisterInfo(), in SIRegisterInfo()
DAMDGPUISelDAGToDAG.cpp290 const AMDGPURegisterInfo *TRI = Subtarget->getRegisterInfo(); in Select()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DAMDGPURegisterInfo.cpp23 AMDGPURegisterInfo::AMDGPURegisterInfo() : AMDGPUGenRegisterInfo(0) {} in AMDGPURegisterInfo() function in AMDGPURegisterInfo
30 unsigned AMDGPURegisterInfo::getSubRegFromChannel(unsigned Channel) { in getSubRegFromChannel()
42 void AMDGPURegisterInfo::reserveRegisterTuples(BitVector &Reserved, unsigned Reg) const { in reserveRegisterTuples()
DAMDGPURegisterInfo.h27 struct AMDGPURegisterInfo : public AMDGPUGenRegisterInfo { struct
28 AMDGPURegisterInfo();
DR600ExpandSpecialInstrs.cpp223 unsigned SubRegIndex = AMDGPURegisterInfo::getSubRegFromChannel(Chan); in runOnMachineFunction()
228 unsigned SubRegIndex0 = AMDGPURegisterInfo::getSubRegFromChannel(CubeSrcSwz[Chan]); in runOnMachineFunction()
229 unsigned SubRegIndex1 = AMDGPURegisterInfo::getSubRegFromChannel(CubeSrcSwz[3 - Chan]); in runOnMachineFunction()
238 unsigned SubRegIndex = AMDGPURegisterInfo::getSubRegFromChannel(Chan); in runOnMachineFunction()
DAMDGPURegisterInfo.td1 //===-- AMDGPURegisterInfo.td - AMDGPU register info -------*- tablegen -*-===//
DSIRegisterInfo.h29 class SIRegisterInfo final : public AMDGPURegisterInfo {
DCMakeLists.txt64 AMDGPURegisterInfo.cpp
DSIRegisterInfo.cpp60 AMDGPURegisterInfo(), in SIRegisterInfo()
1542 return AMDGPURegisterInfo::getRegPressureLimit(RC, MF); in getRegPressureLimit()
1560 return AMDGPURegisterInfo::getRegPressureSetLimit(MF, Idx); in getRegPressureSetLimit()
1568 return AMDGPURegisterInfo::getRegUnitPressureSets(RegUnit); in getRegUnitPressureSets()
DR600ControlFlowFinalizer.cpp312 AMDGPURegisterInfo::getSubRegFromChannel(TRI->getHWRegChan(Reg)), in isCompatibleWithClause()
321 AMDGPURegisterInfo::getSubRegFromChannel(TRI->getHWRegChan(Reg)), in isCompatibleWithClause()
DAMDGPU.td732 include "AMDGPURegisterInfo.td"
DAMDGPUISelDAGToDAG.cpp435 unsigned Sub = AMDGPURegisterInfo::getSubRegFromChannel(i); in SelectBuildVector()
445 unsigned Sub = AMDGPURegisterInfo::getSubRegFromChannel(i); in SelectBuildVector()
DR600InstrInfo.cpp81 unsigned SubRegIndex = AMDGPURegisterInfo::getSubRegFromChannel(I); in copyPhysReg()