Searched refs:ANDNP (Results 1 – 12 of 12) sorted by relevance
/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86ISelLowering.h | 180 ANDNP, enumerator
|
D | X86InstrFragmentsSIMD.td | 62 def X86andnp : SDNode<"X86ISD::ANDNP",
|
D | X86ISelLowering.cpp | 10660 case X86ISD::ANDNP: return "X86ISD::ANDNP"; in getTargetNodeName() 13362 return DAG.getNode(X86ISD::ANDNP, DL, VT, N0.getOperand(0), N1); in PerformAndCombine() 13368 return DAG.getNode(X86ISD::ANDNP, DL, VT, N1.getOperand(0), N0); in PerformAndCombine() 13394 if (N0.getOpcode() == X86ISD::ANDNP) in PerformOrCombine() 13397 if (N0.getOpcode() == ISD::AND && N1.getOpcode() == X86ISD::ANDNP) { in PerformOrCombine()
|
D | X86GenFastISel.inc | 2318 // FastEmit functions for X86ISD::ANDNP. 3682 case X86ISD::ANDNP: return FastEmit_X86ISD_ANDNP_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
|
D | X86GenDAGISel.inc | 43040 /*SwitchOpcode*/ 127|128,2/*383*/, TARGET_VAL(X86ISD::ANDNP),// ->90340
|
/external/llvm/lib/Target/X86/ |
D | X86ISelLowering.h | 188 ANDNP, enumerator
|
D | X86InstrFragmentsSIMD.td | 93 def X86andnp : SDNode<"X86ISD::ANDNP",
|
D | X86ISelLowering.cpp | 7454 V2 = DAG.getBitcast(VT, DAG.getNode(X86ISD::ANDNP, DL, MaskVT, in lowerVectorShuffleAsBitBlend() 22126 case X86ISD::ANDNP: return "X86ISD::ANDNP"; in getTargetNodeName() 27991 return DAG.getNode(X86ISD::ANDNP, DL, VT, N00, N1); in combineANDXORWithAllOnesIntoANDNP() 28309 if (N0.getOpcode() == X86ISD::ANDNP) in combineLogicBlendIntoPBLENDV() 28312 if (N0.getOpcode() != ISD::AND || N1.getOpcode() != X86ISD::ANDNP) in combineLogicBlendIntoPBLENDV() 29794 case X86ISD::FANDN: IntOpcode = X86ISD::ANDNP; break; in lowerX86FPLogicOp()
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
D | X86ISelLowering.h | 199 ANDNP, enumerator
|
D | X86InstrFragmentsSIMD.td | 79 def X86andnp : SDNode<"X86ISD::ANDNP",
|
D | X86ISelLowering.cpp | 4409 case X86ISD::ANDNP: in isTargetShuffleVariableMask() 6180 case X86ISD::ANDNP: { in getFauxShuffleMask() 6186 bool IsAndN = (X86ISD::ANDNP == Opcode); in getFauxShuffleMask() 9669 V2 = DAG.getBitcast(VT, DAG.getNode(X86ISD::ANDNP, DL, MaskVT, in lowerVectorShuffleAsBitBlend() 25944 case X86ISD::ANDNP: return "X86ISD::ANDNP"; in getTargetNodeName() 32462 SDValue AndN = DAG.getNode(X86ISD::ANDNP, DL, AndNVT, CastCond, CastRHS); in combineVSelectWithAllOnesOrZeros() 34504 return DAG.getNode(X86ISD::ANDNP, SDLoc(N), VT, X, Y); in combineANDXORWithAllOnesIntoANDNP() 34873 if (N0.getOpcode() != ISD::AND || N1.getOpcode() != X86ISD::ANDNP) in matchLogicBlend() 37049 case X86ISD::FANDN: IntOpcode = X86ISD::ANDNP; break; in lowerX86FPLogicOp() 39666 case X86ISD::ANDNP: return combineAndnp(N, DAG, DCI, Subtarget); in PerformDAGCombine()
|
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/X86/ |
D | X86GenFastISel.inc | 8438 // FastEmit functions for X86ISD::ANDNP. 11988 case X86ISD::ANDNP: return fastEmit_X86ISD_ANDNP_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
|