/external/llvm/test/CodeGen/AArch64/ |
D | arm64-AnInfiniteLoopInDAGCombine.ll | 10 ; As we think the (2) optimization from SIGN_EXTEND to ANY_EXTEND is
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
D | arm64-AnInfiniteLoopInDAGCombine.ll | 10 ; As we think the (2) optimization from SIGN_EXTEND to ANY_EXTEND is
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/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
D | LegalizeIntegerTypes.cpp | 94 case ISD::ANY_EXTEND: Res = PromoteIntRes_INT_EXTEND(N); break; in PromoteIntegerResult() 226 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, GetSoftenedFloat(InOp)); in PromoteIntRes_BITCAST() 233 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, in PromoteIntRes_BITCAST() 247 InOp = DAG.getNode(ISD::ANY_EXTEND, dl, in PromoteIntRes_BITCAST() 259 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, in PromoteIntRes_BITCAST() 277 return DAG.getNode(ISD::ANY_EXTEND, N->getDebugLoc(), in PromoteIntRes_BUILD_PAIR() 402 assert(N->getOpcode() == ISD::ANY_EXTEND && "Unknown integer extension!"); in PromoteIntRes_INT_EXTEND() 753 case ISD::ANY_EXTEND: Res = PromoteIntOp_ANY_EXTEND(N); break; in PromoteIntegerOperand() 839 return DAG.getNode(ISD::ANY_EXTEND, N->getDebugLoc(), N->getValueType(0), Op); in PromoteIntOp_ANY_EXTEND() 1015 Op = DAG.getNode(ISD::ANY_EXTEND, dl, N->getValueType(0), Op); in PromoteIntOp_SIGN_EXTEND() [all …]
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D | DAGCombiner.cpp | 718 if (!TLI.isOperationLegal(ISD::ANY_EXTEND, PVT)) in PromoteOperand() 720 return DAG.getNode(ISD::ANY_EXTEND, dl, PVT, Op); in PromoteOperand() 1081 case ISD::ANY_EXTEND: return visitANY_EXTEND(N); in visit() 1154 case ISD::ANY_EXTEND: in combine() 2222 (N0.getOpcode() == ISD::ANY_EXTEND && in SimplifyBinOpWithSameOpcodeHands() 2297 if (N1C && N0.getOpcode() == ISD::ANY_EXTEND) { in visitAND() 2420 (N0.getOpcode() == ISD::ANY_EXTEND && in visitAND() 2422 bool HasAnyExt = N0.getOpcode() == ISD::ANY_EXTEND; in visitAND() 3006 || LHSShiftAmt.getOpcode() == ISD::ANY_EXTEND in MatchRotate() 3010 || RHSShiftAmt.getOpcode() == ISD::ANY_EXTEND in MatchRotate() [all …]
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D | TargetLowering.cpp | 1014 ISD::NodeType ExtendKind = ISD::ANY_EXTEND; in GetReturnInfo() 1025 if (ExtendKind != ISD::ANY_EXTEND && VT.isInteger()) { in GetReturnInfo() 1473 if (InOp.getNode()->getOpcode() == ISD::ANY_EXTEND) { in SimplifyDemandedBits() 1488 TLO.DAG.getNode(ISD::ANY_EXTEND, dl, Op.getValueType(), in SimplifyDemandedBits() 1645 return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::ANY_EXTEND, dl, in SimplifyDemandedBits() 1667 return TLO.CombineTo(Op,TLO.DAG.getNode(ISD::ANY_EXTEND, dl, in SimplifyDemandedBits() 1699 case ISD::ANY_EXTEND: { in SimplifyDemandedBits() 2218 DAG.getNode(ISD::ANY_EXTEND, dl, VT, Op0.getOperand(0)), in SimplifySetCC()
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D | LegalizeVectorOps.cpp | 167 case ISD::ANY_EXTEND: in LegalizeOp()
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D | LegalizeVectorTypes.cpp | 67 case ISD::ANY_EXTEND: in ScalarizeVectorResult() 367 Res = DAG.getNode(ISD::ANY_EXTEND, N->getDebugLoc(), N->getValueType(0), in ScalarizeVecOp_EXTRACT_VECTOR_ELT() 442 case ISD::ANY_EXTEND: in SplitVectorResult() 993 case ISD::ANY_EXTEND: in SplitVectorOperand() 1282 case ISD::ANY_EXTEND: in WidenVectorResult() 2044 case ISD::ANY_EXTEND: in WidenVectorOperand()
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/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 365 ANY_EXTEND, enumerator
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeIntegerTypes.cpp | 112 case ISD::ANY_EXTEND: Res = PromoteIntRes_INT_EXTEND(N); break; in PromoteIntegerResult() 267 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, GetSoftenedFloat(InOp)); in PromoteIntRes_BITCAST() 280 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, in PromoteIntRes_BITCAST() 294 InOp = DAG.getNode(ISD::ANY_EXTEND, dl, in PromoteIntRes_BITCAST() 308 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, in PromoteIntRes_BITCAST() 341 return DAG.getNode(ISD::ANY_EXTEND, SDLoc(N), in PromoteIntRes_BUILD_PAIR() 466 assert(N->getOpcode() == ISD::ANY_EXTEND && "Unknown integer extension!"); in PromoteIntRes_INT_EXTEND() 879 case ISD::ANY_EXTEND: Res = PromoteIntOp_ANY_EXTEND(N); break; in PromoteIntegerOperand() 992 return DAG.getNode(ISD::ANY_EXTEND, SDLoc(N), N->getValueType(0), Op); in PromoteIntOp_ANY_EXTEND() 1158 Op = DAG.getNode(ISD::ANY_EXTEND, dl, N->getValueType(0), Op); in PromoteIntOp_SIGN_EXTEND() [all …]
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D | TargetLowering.cpp | 413 SDValue Z = DAG.getNode(NeedZext ? ISD::ZERO_EXTEND : ISD::ANY_EXTEND, in ShrinkDemandedOp() 696 if (InOp.getNode()->getOpcode() == ISD::ANY_EXTEND) { in SimplifyDemandedBits() 710 TLO.DAG.getNode(ISD::ANY_EXTEND, dl, Op.getValueType(), in SimplifyDemandedBits() 732 SDValue NewExt = TLO.DAG.getNode(ISD::ANY_EXTEND, dl, VT, in SimplifyDemandedBits() 968 return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::ANY_EXTEND, dl, in SimplifyDemandedBits() 990 return TLO.CombineTo(Op,TLO.DAG.getNode(ISD::ANY_EXTEND, dl, in SimplifyDemandedBits() 1022 case ISD::ANY_EXTEND: { in SimplifyDemandedBits() 1722 DAG.getNode(ISD::ANY_EXTEND, dl, VT, Op0.getOperand(0)), in SimplifySetCC() 3268 ISD::ANY_EXTEND, dl, VT, Result); in expandUnalignedLoad()
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D | DAGCombiner.cpp | 988 if (!TLI.isOperationLegal(ISD::ANY_EXTEND, PVT)) in PromoteOperand() 990 return DAG.getNode(ISD::ANY_EXTEND, dl, PVT, Op); in PromoteOperand() 1397 case ISD::ANY_EXTEND: return visitANY_EXTEND(N); in visit() 1486 case ISD::ANY_EXTEND: in combine() 2725 (N0.getOpcode() == ISD::ANY_EXTEND && in SimplifyBinOpWithSameOpcodeHands() 3105 if (N1C && N0.getOpcode() == ISD::ANY_EXTEND) { in visitAND() 3234 (N0.getOpcode() == ISD::ANY_EXTEND && in visitAND() 3236 bool HasAnyExt = N0.getOpcode() == ISD::ANY_EXTEND; in visitAND() 4104 LHSShiftAmt.getOpcode() == ISD::ANY_EXTEND || in MatchRotate() 4108 RHSShiftAmt.getOpcode() == ISD::ANY_EXTEND || in MatchRotate() [all …]
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D | LegalizeVectorTypes.cpp | 69 case ISD::ANY_EXTEND: in ScalarizeVectorResult() 436 case ISD::ANY_EXTEND: in ScalarizeVectorOperand() 513 Res = DAG.getNode(ISD::ANY_EXTEND, SDLoc(N), N->getValueType(0), in ScalarizeVecOp_EXTRACT_VECTOR_ELT() 661 case ISD::ANY_EXTEND: in SplitVectorResult() 1504 case ISD::ANY_EXTEND: in SplitVectorOperand() 2135 case ISD::ANY_EXTEND: in WidenVectorResult() 2456 Val = DAG.getNode(ISD::ANY_EXTEND, DL, WidenSVT, Val); in WidenVecRes_EXTEND_VECTOR_INREG() 3090 case ISD::ANY_EXTEND: in WidenVectorOperand() 3176 case ISD::ANY_EXTEND: in WidenVecOp_EXTEND()
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/external/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 398 ANY_EXTEND, enumerator
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeIntegerTypes.cpp | 114 case ISD::ANY_EXTEND: Res = PromoteIntRes_INT_EXTEND(N); break; in PromoteIntegerResult() 269 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, GetSoftenedFloat(InOp)); in PromoteIntRes_BITCAST() 282 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, in PromoteIntRes_BITCAST() 296 InOp = DAG.getNode(ISD::ANY_EXTEND, dl, in PromoteIntRes_BITCAST() 310 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, in PromoteIntRes_BITCAST() 343 return DAG.getNode(ISD::ANY_EXTEND, SDLoc(N), in PromoteIntRes_BUILD_PAIR() 460 assert(N->getOpcode() == ISD::ANY_EXTEND && "Unknown integer extension!"); in PromoteIntRes_INT_EXTEND() 918 case ISD::ANY_EXTEND: Res = PromoteIntOp_ANY_EXTEND(N); break; in PromoteIntegerOperand() 1034 return DAG.getNode(ISD::ANY_EXTEND, SDLoc(N), N->getValueType(0), Op); in PromoteIntOp_ANY_EXTEND() 1191 Op = DAG.getNode(ISD::ANY_EXTEND, dl, N->getValueType(0), Op); in PromoteIntOp_SIGN_EXTEND() [all …]
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D | LegalizeVectorTypes.cpp | 72 case ISD::ANY_EXTEND: in ScalarizeVectorResult() 288 return DAG.getNode(ISD::ANY_EXTEND, DL, EltVT, Op); in ScalarizeVecRes_VecInregOp() 462 case ISD::ANY_EXTEND: in ScalarizeVectorOperand() 545 : DAG.getNode(ISD::ANY_EXTEND, SDLoc(N), VT, Res); in ScalarizeVecOp_EXTRACT_VECTOR_ELT() 718 case ISD::ANY_EXTEND: in SplitVectorResult() 1139 Vec = DAG.getNode(ISD::ANY_EXTEND, dl, VecVT, Vec); in SplitVecRes_INSERT_VECTOR_ELT() 1142 Elt = DAG.getNode(ISD::ANY_EXTEND, dl, EltVT, Elt); in SplitVecRes_INSERT_VECTOR_ELT() 1643 case ISD::ANY_EXTEND: in SplitVectorOperand() 1851 Vec = DAG.getNode(ISD::ANY_EXTEND, dl, VecVT, Vec); in SplitVecOp_EXTRACT_VECTOR_ELT() 2343 case ISD::ANY_EXTEND: in WidenVectorResult() [all …]
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D | TargetLowering.cpp | 425 SDValue Z = DAG.getNode(ISD::ANY_EXTEND, dl, Op.getValueType(), X); in ShrinkDemandedOp() 823 if (InOp.getNode()->getOpcode() == ISD::ANY_EXTEND) { in SimplifyDemandedBits() 837 TLO.DAG.getNode(ISD::ANY_EXTEND, dl, VT, NarrowShl)); in SimplifyDemandedBits() 855 SDValue NewExt = TLO.DAG.getNode(ISD::ANY_EXTEND, dl, VT, in SimplifyDemandedBits() 1068 return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::ANY_EXTEND, dl, VT, in SimplifyDemandedBits() 1084 return TLO.CombineTo(Op,TLO.DAG.getNode(ISD::ANY_EXTEND, dl, VT, in SimplifyDemandedBits() 1105 case ISD::ANY_EXTEND: { in SimplifyDemandedBits() 2319 DAG.getNode(ISD::ANY_EXTEND, dl, VT, Op0.getOperand(0)), in SimplifySetCC() 4007 ISD::ANY_EXTEND, dl, VT, Result); in expandUnalignedLoad()
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D | FunctionLoweringInfo.cpp | 67 ISD::NodeType ExtendKind = ISD::ANY_EXTEND; in getPreferredExtendForValue()
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/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 443 ANY_EXTEND, enumerator
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/external/swiftshader/third_party/LLVM/lib/Target/Blackfin/ |
D | BlackfinISelLowering.cpp | 266 Opi = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Opi); in LowerReturn() 323 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
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/external/llvm/lib/Target/NVPTX/ |
D | NVPTXISelLowering.cpp | 1126 StVal = DAG.getNode(ISD::ANY_EXTEND, dl, MVT::i16, StVal); in LowerCall() 1359 theVal = DAG.getNode(ISD::ANY_EXTEND, dl, MVT::i16, theVal); in LowerCall() 1863 Op1 = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i32, Op1); in LowerSelect() 1864 Op2 = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i32, Op2); in LowerSelect() 1989 ExtVal = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i16, ExtVal); in LowerSTOREVector() 2227 P = DAG.getNode(ISD::ANY_EXTEND, dl, Ins[InsIdx].VT, P); in LowerFormalArguments() 2249 Elt0 = DAG.getNode(ISD::ANY_EXTEND, dl, Ins[InsIdx].VT, Elt0); in LowerFormalArguments() 2250 Elt1 = DAG.getNode(ISD::ANY_EXTEND, dl, Ins[InsIdx].VT, Elt1); in LowerFormalArguments() 2292 Elt = DAG.getNode(ISD::ANY_EXTEND, dl, Ins[InsIdx].VT, Elt); in LowerFormalArguments() 2523 TmpVal = DAG.getNode(ISD::ANY_EXTEND, dl, MVT::i16, TmpVal); in LowerReturn() [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/ |
D | SystemZISelDAGToDAG.cpp | 837 case ISD::ANY_EXTEND: in expandRxSBG() 957 if (RISBG.Input.getOpcode() != ISD::ANY_EXTEND && in tryRISBGZero() 1063 if (RxSBG[I].Input.getOpcode() != ISD::ANY_EXTEND && in tryRxSBG() 1790 Result = CurDAG->getNode(ISD::ANY_EXTEND, DL, VT, Result); in expandSelectBoolean()
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D | SystemZISelLowering.h | 522 return ISD::ANY_EXTEND; in getExtendForAtomicOps()
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/external/llvm/lib/Target/SystemZ/ |
D | SystemZISelDAGToDAG.cpp | 820 case ISD::ANY_EXTEND: in expandRxSBG() 933 if (RISBG.Input.getOpcode() != ISD::ANY_EXTEND && in tryRISBGZero() 1025 if (RxSBG[I].Input.getOpcode() != ISD::ANY_EXTEND && in tryRxSBG()
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D | SystemZISelLowering.h | 482 return ISD::ANY_EXTEND; in getExtendForAtomicOps()
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/external/swiftshader/third_party/LLVM/lib/Target/SystemZ/ |
D | SystemZISelLowering.cpp | 422 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCCCCallTo() 593 ResValue = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), ResValue); in LowerReturn()
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