Searched refs:APB0_SRC_PLL_PERIPH0 (Results 1 – 2 of 2) sorted by relevance
50 writel(APB0_SRC_PLL_PERIPH0 | APB0_CLK_DIV_RATIO(8), in clock_init_safe()
160 #define APB0_SRC_PLL_PERIPH0 (0x1 << APB0_SRC_CLK_SELECT_SHIFT) macro