Home
last modified time | relevance | path

Searched refs:APBC_RST (Results 1 – 3 of 3) sorted by relevance

/external/u-boot/arch/arm/cpu/arm926ejs/armada100/
Dcpu.c50 writel(APBC_RST | APBC_FNCLK | APBC_APBCLK, &apb1clkres->twsi0); in arch_cpu_init()
54 writel(APBC_RST | APBC_FNCLK | APBC_APBCLK, &apb1clkres->twsi1); in arch_cpu_init()
Dtimer.c154 writel(APBC_APBCLK | APBC_FNCLK | APBC_RST, &mpmu->wdtpcr); in reset_cpu()
/external/u-boot/arch/arm/include/asm/arch-armada100/
Darmada100.h17 #define APBC_RST (1<<2) /* Reset Generation */ macro