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Searched refs:APSR_g (Results 1 – 25 of 26) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Dspecial-reg-acore.ll31 ; ACORE: msr APSR_g, r0
35 ; ACORE: msr APSR_g, r0
/external/llvm/test/CodeGen/ARM/
Dspecial-reg-acore.ll31 ; ACORE: msr APSR_g, r0
35 ; ACORE: msr APSR_g, r0
/external/vixl/src/aarch32/
Dinstructions-aarch32.cc224 case APSR_g: in GetName()
Dinstructions-aarch32.h841 APSR_g = 0x04, enumerator
846 CPSR_s = APSR_g,
/external/vixl/test/aarch32/
Dtest-simulator-cond-rd-rn-rm-sel-t32.cc472 __ Msr(APSR_g, ge_bits); in TestHelper()
Dtest-simulator-cond-rd-rn-rm-sel-a32.cc472 __ Msr(APSR_g, ge_bits); in TestHelper()
Dtest-simulator-cond-rd-rn-rm-q-t32.cc479 __ Msr(APSR_g, ge_bits); in TestHelper()
Dtest-simulator-cond-rd-rn-rm-q-a32.cc479 __ Msr(APSR_g, ge_bits); in TestHelper()
Dtest-simulator-cond-rd-rn-rm-ge-t32.cc495 __ Msr(APSR_g, ge_bits); in TestHelper()
Dtest-simulator-cond-rd-rn-rm-ge-a32.cc495 __ Msr(APSR_g, ge_bits); in TestHelper()
Dtest-simulator-cond-rd-rn-rm-a32.cc1583 __ Msr(APSR_g, ge_bits); in TestHelper()
Dtest-simulator-cond-rd-rn-rm-t32.cc1581 __ Msr(APSR_g, ge_bits); in TestHelper()
/external/capstone/suite/MC/ARM/
Dbasic-arm-instructions.s.cs389 0x05,0xf0,0x24,0xe3 = msr APSR_g, #5
403 0x00,0xf0,0x24,0xe1 = msr APSR_g, r0
Dbasic-thumb2-instructions.s.cs492 0x82,0xf3,0x00,0x84 = msr APSR_g, r2
/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/
Dbasic-arm-instructions.txt748 # CHECK: msr APSR_g, #5
778 # CHECK: msr APSR_g, r0
Dthumb2.txt1002 # CHECK: msr APSR_g, r2
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/
Dbasic-arm-instructions.txt849 # CHECK: msr APSR_g, #5
883 # CHECK: msr APSR_g, r0
Dthumb2.txt1119 # CHECK: msr APSR_g, r2
/external/llvm/test/MC/Disassembler/ARM/
Dbasic-arm-instructions.txt849 # CHECK: msr APSR_g, #5
883 # CHECK: msr APSR_g, r0
Dthumb2.txt1119 # CHECK: msr APSR_g, r2
/external/swiftshader/third_party/LLVM/test/MC/ARM/
Dbasic-arm-instructions.s927 @ CHECK: msr APSR_g, #5 @ encoding: [0x05,0xf0,0x24,0xe3]
957 @ CHECK: msr APSR_g, r0 @ encoding: [0x00,0xf0,0x24,0xe1]
Dbasic-thumb2-instructions.s1192 @ CHECK: msr APSR_g, r2 @ encoding: [0x82,0xf3,0x00,0x84]
/external/llvm/test/MC/ARM/
Dbasic-arm-instructions.s1450 @ CHECK: msr APSR_g, #5 @ encoding: [0x05,0xf0,0x24,0xe3]
1487 @ CHECK: msr APSR_g, r0 @ encoding: [0x00,0xf0,0x24,0xe1]
Dbasic-thumb2-instructions.s1576 @ CHECK: msr APSR_g, r2 @ encoding: [0x82,0xf3,0x00,0x84]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/
Dbasic-arm-instructions.s1452 @ CHECK: msr APSR_g, #5 @ encoding: [0x05,0xf0,0x24,0xe3]
1489 @ CHECK: msr APSR_g, r0 @ encoding: [0x00,0xf0,0x24,0xe1]

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