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Searched refs:AR71XX_DDR_REG_MODE (Results 1 – 4 of 4) sorted by relevance

/external/u-boot/arch/mips/mach-ath79/ar933x/
Dddr.c143 writel(DDR2_MODE_DLL_VAL, regs + AR71XX_DDR_REG_MODE); in ddr_init()
156 writel(DDR2_MODE_VAL, regs + AR71XX_DDR_REG_MODE); in ddr_init()
195 writel(DDR1_MODE_DLL_VAL, regs + AR71XX_DDR_REG_MODE); in ddr_init()
210 writel(DDR1_MODE_VAL, regs + AR71XX_DDR_REG_MODE); in ddr_init()
/external/u-boot/arch/mips/mach-ath79/qca953x/
Dddr.c266 writel(DDR1_MODE_DLL_VAL, regs + AR71XX_DDR_REG_MODE); in ddr_init()
284 writel(DDR1_MODE_VAL, regs + AR71XX_DDR_REG_MODE); in ddr_init()
356 writel(DDR2_MODE_DLL_VAL, regs + AR71XX_DDR_REG_MODE); in ddr_init()
374 writel(DDR2_MODE_VAL, regs + AR71XX_DDR_REG_MODE); in ddr_init()
/external/u-boot/arch/mips/mach-ath79/ar934x/
Dddr.c101 writel(memcfg->mode | 0x100, ddr_regs + AR71XX_DDR_REG_MODE); in ar934x_ddr_init()
126 writel(memcfg->mode, ddr_regs + AR71XX_DDR_REG_MODE); in ar934x_ddr_init()
/external/u-boot/arch/mips/mach-ath79/include/mach/
Dar71xx_regs.h209 #define AR71XX_DDR_REG_MODE 0x08 macro