| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/GlobalISel/ |
| D | arm64-callingconv.ll | 7 ; CHECK: %[[ARG0:[0-9]+]]:_(s32) = COPY $w0
15 ; CHECK: $w0 = COPY %[[ARG0]]
23 ; CHECK: %[[ARG0:[0-9]+]]:_(s64) = COPY $x0
31 ; CHECK: $x0 = COPY %[[ARG0]]
39 ; CHECK: %[[ARG0:[0-9]+]]:_(p0) = COPY $x0
47 ; CHECK: $x0 = COPY %[[ARG0]]
54 ; CHECK: %[[ARG0:[0-9]+]]:_(s64) = COPY $d0
55 ; CHECK: $d0 = COPY %[[ARG0]]
|
| D | call-translator.ll | 69 ; CHECK: [[ARG0:%[0-9]+]]:_(s192) = G_INSERT [[UNDEF]], [[DBL]](s64), 0
70 ; CHECK: [[ARG1:%[0-9]+]]:_(s192) = G_INSERT [[ARG0]], [[I64]](s64), 64
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/Mips/ |
| D | fcopysign.ll | 43 ; CHECK-EL: mfc1 $[[ARG0:[0-9]+]], $f12
47 ; CHECK-EL: and $[[T2:[0-9]+]], $[[ARG0]], $[[MSK0]]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Hexagon/ |
| D | dead-store-stack.ll | 3 ; CHECK: r[[ARG0:[0-9]+]] = memuh(r[[ARG1:[0-9]+]]+#[[OFFSET:[0-9]+]])
4 ; CHECK: memw(r[[ARG1]]+#[[OFFSET]]) = r[[ARG0]]
|
| /external/deqp/external/vulkancts/modules/vulkan/shaderexecutor/ |
| D | vktShaderBuiltinPrecisionTests.cpp | 2690 #define DEFINE_DERIVED1(CLASS, TRET, NAME, T0, ARG0, EXPANSION) \ argument
2700 const ExprP<float>& ARG0 = args_.a; \
2706 #define DEFINE_DERIVED_FLOAT1(CLASS, NAME, ARG0, EXPANSION) \ argument
2707 DEFINE_DERIVED1(CLASS, float, NAME, float, ARG0, EXPANSION)
2710 #define DEFINE_DERIVED1_INPUTRANGE(CLASS, TRET, NAME, T0, ARG0, EXPANSION, INTERVAL) \ argument
2720 const ExprP<float>& ARG0 = args_.a; \
2730 #define DEFINE_DERIVED_FLOAT1_INPUTRANGE(CLASS, NAME, ARG0, EXPANSION, INTERVAL) \ argument
2731 DEFINE_DERIVED1_INPUTRANGE(CLASS, float, NAME, float, ARG0, EXPANSION, INTERVAL)
2733 #define DEFINE_DERIVED1_16BIT(CLASS, TRET, NAME, T0, ARG0, EXPANSION) \ argument
2743 const ExprP<deFloat16>& ARG0 = args_.a; \
[all …]
|
| /external/deqp/modules/glshared/ |
| D | glsBuiltinPrecisionTests.cpp | 2201 #define DEFINE_DERIVED1(CLASS, TRET, NAME, T0, ARG0, EXPANSION) \ argument
2211 const ExprP<float>& ARG0 = args_.a; \
2217 #define DEFINE_DERIVED_FLOAT1(CLASS, NAME, ARG0, EXPANSION) \ argument
2218 DEFINE_DERIVED1(CLASS, float, NAME, float, ARG0, EXPANSION)
2251 #define DEFINE_DERIVED3(CLASS, TRET, NAME, T0, ARG0, T1, ARG1, T2, ARG2, EXPANSION) \ argument
2260 const ExprP<T0>& ARG0 = args_.a; \
2268 #define DEFINE_DERIVED_FLOAT3(CLASS, NAME, ARG0, ARG1, ARG2, EXPANSION) \ argument
2269 DEFINE_DERIVED3(CLASS, float, NAME, float, ARG0, float, ARG1, float, ARG2, EXPANSION)
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/StructurizeCFG/AMDGPU/ |
| D | loop-subregion-misordered.ll | 27 ; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i32, i32 addrspace(1)* [[ARG0:%.*]], i32 [[TI…
|
| D | backedge-id-bug.ll | 23 ; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i32, i32 addrspace(1)* [[ARG0:%.*]], i32 [[TI…
|
| /external/llvm/lib/Target/X86/ |
| D | X86CallingConv.td | 475 // Pass in VM's registers: HP, P, ARG0, ARG1, ARG2, ARG3
754 // Pass in VM's registers: HP, P, ARG0, ARG1, ARG2
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86CallingConv.td | 682 // Pass in VM's registers: HP, P, ARG0, ARG1, ARG2, ARG3
947 // Pass in VM's registers: HP, P, ARG0, ARG1, ARG2
|
| /external/icu/icu4c/source/i18n/ |
| D | tzfmt.cpp | 92 static const UChar ARG0[] = {0x007B, 0x0030, 0x007D}; // "{0}" variable
2390 int32_t idx = gmtPattern.indexOf(ARG0, ARG0_LEN, 0); in initGMTPattern()
|
| /external/clang/include/clang/Basic/ |
| D | arm_neon.td | 125 // shuffle - Create a vector shuffle. The syntax is (shuffle ARG0, ARG1, MASK).
128 // the lane indices in sequence for ARG0, and "mask1" expands to
164 // mask0 - The initial sequence of lanes for shuffle ARG0
|