| /external/strace/tests/ |
| D | futex.c | 90 ARG3 = 1 << 0, enumerator
132 if (((1 << i) == ARG3) || ((1 << i) == ARG6) || in invalid_op()
369 CHECK_INVALID_CLOCKRT(FUTEX_WAKE, ARG3, "%u"); in main()
406 CHECK_INVALID_CLOCKRT(FUTEX_WAKE_BITSET, ARG3 | ARG6, "%u", "%#x"); in main()
429 CHECK_INVALID_CLOCKRT(FUTEX_FD, ARG3, "%u"); in main()
463 CHECK_INVALID_CLOCKRT(FUTEX_REQUEUE, ARG3 | ARG4 | ARG5, "%u", "%u", in main()
511 CHECK_INVALID_CLOCKRT(FUTEX_CMP_REQUEUE, ARG3 | ARG4 | ARG5 | ARG6, in main()
624 CHECK_INVALID_CLOCKRT(FUTEX_WAKE_OP, ARG3 | ARG4 | ARG5 | ARG6, in main()
787 CHECK_INVALID_CLOCKRT(FUTEX_CMP_REQUEUE_PI, ARG3 | ARG4 | ARG5 | ARG6, in main()
|
| /external/strace/tests-mx32/ |
| D | futex.c | 90 ARG3 = 1 << 0, enumerator
132 if (((1 << i) == ARG3) || ((1 << i) == ARG6) || in invalid_op()
369 CHECK_INVALID_CLOCKRT(FUTEX_WAKE, ARG3, "%u"); in main()
406 CHECK_INVALID_CLOCKRT(FUTEX_WAKE_BITSET, ARG3 | ARG6, "%u", "%#x"); in main()
429 CHECK_INVALID_CLOCKRT(FUTEX_FD, ARG3, "%u"); in main()
463 CHECK_INVALID_CLOCKRT(FUTEX_REQUEUE, ARG3 | ARG4 | ARG5, "%u", "%u", in main()
511 CHECK_INVALID_CLOCKRT(FUTEX_CMP_REQUEUE, ARG3 | ARG4 | ARG5 | ARG6, in main()
624 CHECK_INVALID_CLOCKRT(FUTEX_WAKE_OP, ARG3 | ARG4 | ARG5 | ARG6, in main()
787 CHECK_INVALID_CLOCKRT(FUTEX_CMP_REQUEUE_PI, ARG3 | ARG4 | ARG5 | ARG6, in main()
|
| /external/strace/tests-m32/ |
| D | futex.c | 90 ARG3 = 1 << 0, enumerator
132 if (((1 << i) == ARG3) || ((1 << i) == ARG6) || in invalid_op()
369 CHECK_INVALID_CLOCKRT(FUTEX_WAKE, ARG3, "%u"); in main()
406 CHECK_INVALID_CLOCKRT(FUTEX_WAKE_BITSET, ARG3 | ARG6, "%u", "%#x"); in main()
429 CHECK_INVALID_CLOCKRT(FUTEX_FD, ARG3, "%u"); in main()
463 CHECK_INVALID_CLOCKRT(FUTEX_REQUEUE, ARG3 | ARG4 | ARG5, "%u", "%u", in main()
511 CHECK_INVALID_CLOCKRT(FUTEX_CMP_REQUEUE, ARG3 | ARG4 | ARG5 | ARG6, in main()
624 CHECK_INVALID_CLOCKRT(FUTEX_WAKE_OP, ARG3 | ARG4 | ARG5 | ARG6, in main()
787 CHECK_INVALID_CLOCKRT(FUTEX_CMP_REQUEUE_PI, ARG3 | ARG4 | ARG5 | ARG6, in main()
|
| /external/mesa3d/src/mesa/x86/ |
| D | assyntax.h | 377 #define ARG3(a,b,c) a,b,c macro
648 #define SHLD_L(a,b,c) CHOICE(shldl ARG3(a,b,c), shldl ARG3(a,b,c), _LTOG shld ARG3(c,b,a))
649 #define SHLD2_L(a,b) CHOICE(shldl ARG2(a,b), shldl ARG3(CL,a,b), _LTOG shld ARG3(b,a,CL))
650 #define SHLD_W(a,b,c) CHOICE(shldw ARG3(a,b,c), shldw ARG3(a,b,c), _WTOG shld ARG3(c,b,a))
651 #define SHLD2_W(a,b) CHOICE(shldw ARG2(a,b), shldw ARG3(CL,a,b), _WTOG shld ARG3(b,a,CL))
655 #define SHRD_L(a,b,c) CHOICE(shrdl ARG3(a,b,c), shrdl ARG3(a,b,c), _LTOG shrd ARG3(c,b,a))
656 #define SHRD2_L(a,b) CHOICE(shrdl ARG2(a,b), shrdl ARG3(CL,a,b), _LTOG shrd ARG3(b,a,CL))
657 #define SHRD_W(a,b,c) CHOICE(shrdw ARG3(a,b,c), shrdw ARG3(a,b,c), _WTOG shrd ARG3(c,b,a))
658 #define SHRD2_W(a,b) CHOICE(shrdw ARG2(a,b), shrdw ARG3(CL,a,b), _WTOG shrd ARG3(b,a,CL))
|
| /external/selinux/secilc/docs/ |
| D | cil_type_statements.md | 441 (macro domain_auto_trans ((type ARG1) (type ARG2) (type ARG3))
443 (call domain_trans (ARG1 ARG2 ARG3))
445 (typetransition ARG1 ARG2 process ARG3)
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/GlobalISel/ |
| D | arm-irtranslator.ll | 495 ; CHECK: [[ARG3:%[0-9]+]]:_(s32) = COPY $r2
505 ; CHECK-DAG: [[V3:%[0-9]+]]:_(<4 x s32>) = G_INSERT_VECTOR_ELT [[V2]], [[ARG3]](s32), [[C2]](s32)
|
| /external/llvm/lib/Target/X86/ |
| D | X86CallingConv.td | 475 // Pass in VM's registers: HP, P, ARG0, ARG1, ARG2, ARG3
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86CallingConv.td | 682 // Pass in VM's registers: HP, P, ARG0, ARG1, ARG2, ARG3
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/GlobalISel/ |
| D | arm64-irtranslator.ll | 1787 ; CHECK: [[ARG3:%[0-9]+]]:_(s32) = COPY $w2
1788 ; CHECK: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[ARG3]](s32)
|