Searched refs:AddInst (Results 1 – 8 of 8) sorted by relevance
| /external/swiftshader/third_party/llvm-7.0/llvm/unittests/Transforms/Utils/ |
| D | Cloning.cpp | 222 Instruction *AddInst = cast<Instruction>(Builder2.CreateAdd(V, V)); in TEST_F() local
223 Instruction *MulInst = cast<Instruction>(Builder2.CreateMul(AddInst, V)); in TEST_F()
233 EXPECT_TRUE(Mapping.find(AddInst) != Mapping.end()); in TEST_F()
236 auto AddSplit = dyn_cast<Instruction>(Mapping[AddInst]); in TEST_F()
269 Instruction *AddInst = cast<Instruction>(Builder2.CreateAdd(V, V)); in TEST_F() local
270 Instruction *MulInst = cast<Instruction>(Builder2.CreateMul(AddInst, V)); in TEST_F()
280 EXPECT_TRUE(Mapping.find(AddInst) != Mapping.end()); in TEST_F()
284 auto AddSplit = dyn_cast<Instruction>(Mapping[AddInst]); in TEST_F()
320 Instruction *AddInst = cast<Instruction>(Builder2.CreateAdd(V, V)); in TEST_F() local
321 Instruction *MulInst = cast<Instruction>(Builder2.CreateMul(AddInst, V)); in TEST_F()
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| /external/swiftshader/third_party/llvm-7.0/llvm/unittests/IR/ |
| D | BasicBlockTest.cpp | 117 Instruction *AddInst = cast<Instruction>(Builder1.CreateAdd(V, V)); in TEST() local
118 Instruction *MulInst = cast<Instruction>(Builder1.CreateMul(AddInst, V)); in TEST()
123 SmallVector<Instruction *, 4> Exp = {Var, AddInst, MulInst, SubInst}; in TEST()
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMAsmPrinter.cpp | 1398 MCInst AddInst; in EmitInstruction() local
1399 AddInst.setOpcode(ARM::tADDhirr); in EmitInstruction()
1400 AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); in EmitInstruction()
1401 AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg())); in EmitInstruction()
1402 AddInst.addOperand(MCOperand::CreateReg(ARM::PC)); in EmitInstruction()
1404 AddInst.addOperand(MCOperand::CreateImm(ARMCC::AL)); in EmitInstruction()
1405 AddInst.addOperand(MCOperand::CreateReg(0)); in EmitInstruction()
1406 OutStreamer.EmitInstruction(AddInst); in EmitInstruction()
1421 MCInst AddInst; in EmitInstruction() local
1422 AddInst.setOpcode(ARM::ADDrr); in EmitInstruction()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCFrameLowering.cpp | 1144 const MCInstrDesc& AddInst = TII.get( isPPC64 ? PPC::ADD8 in emitEpilogue() local
1239 BuildMI(MBB, MBBI, dl, AddInst) in emitEpilogue()
1325 BuildMI(MBB, MBBI, dl, AddInst) in emitEpilogue()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Analysis/ |
| D | InstructionSimplify.cpp | 1566 auto *AddInst = cast<BinaryOperator>(Op0->getOperand(0)); in simplifyAndOfICmpsWithAdd() local
1567 if (AddInst->getOperand(1) != Op1->getOperand(1)) in simplifyAndOfICmpsWithAdd()
1571 bool isNSW = AddInst->hasNoSignedWrap(); in simplifyAndOfICmpsWithAdd()
1572 bool isNUW = AddInst->hasNoUnsignedWrap(); in simplifyAndOfICmpsWithAdd()
1637 auto *AddInst = cast<BinaryOperator>(Op0->getOperand(0)); in simplifyOrOfICmpsWithAdd() local
1638 if (AddInst->getOperand(1) != Op1->getOperand(1)) in simplifyOrOfICmpsWithAdd()
1642 bool isNSW = AddInst->hasNoSignedWrap(); in simplifyOrOfICmpsWithAdd()
1643 bool isNUW = AddInst->hasNoUnsignedWrap(); in simplifyOrOfICmpsWithAdd()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCFrameLowering.cpp | 1274 const MCInstrDesc& AddInst = TII.get( isPPC64 ? PPC::ADD8 in emitEpilogue() local
1384 BuildMI(MBB, MBBI, dl, AddInst) in emitEpilogue()
1541 BuildMI(MBB, MBBI, dl, AddInst) in emitEpilogue()
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| /external/llvm/lib/Analysis/ |
| D | InstructionSimplify.cpp | 1528 auto *AddInst = cast<BinaryOperator>(Op0->getOperand(0)); in SimplifyAndOfICmps() local
1529 bool isNSW = AddInst->hasNoSignedWrap(); in SimplifyAndOfICmps()
1530 bool isNUW = AddInst->hasNoUnsignedWrap(); in SimplifyAndOfICmps()
1702 auto *AddInst = cast<BinaryOperator>(Op0->getOperand(0)); in SimplifyOrOfICmps() local
1703 bool isNSW = AddInst->hasNoSignedWrap(); in SimplifyOrOfICmps()
1704 bool isNUW = AddInst->hasNoUnsignedWrap(); in SimplifyOrOfICmps()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86InstructionSelector.cpp | 1013 MachineInstr &AddInst = in selectUadde() local
1021 if (!constrainSelectedInstRegOperands(AddInst, TII, TRI, RBI) || in selectUadde()
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