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Searched refs:AddRHS (Results 1 – 11 of 11) sorted by relevance

/external/llvm/include/llvm/IR/
DPatternMatch.h1128 Value *AddLHS, *AddRHS; in match() local
1129 auto AddExpr = m_Add(m_Value(AddLHS), m_Value(AddRHS)); in match()
1133 if (AddExpr.match(ICmpLHS) && (ICmpRHS == AddLHS || ICmpRHS == AddRHS)) in match()
1134 return L.match(AddLHS) && R.match(AddRHS) && S.match(ICmpLHS); in match()
1138 if (AddExpr.match(ICmpRHS) && (ICmpLHS == AddLHS || ICmpLHS == AddRHS)) in match()
1139 return L.match(AddLHS) && R.match(AddRHS) && S.match(ICmpRHS); in match()
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/IR/
DPatternMatch.h1476 Value *AddLHS, *AddRHS; in match() local
1477 auto AddExpr = m_Add(m_Value(AddLHS), m_Value(AddRHS)); in match()
1481 if (AddExpr.match(ICmpLHS) && (ICmpRHS == AddLHS || ICmpRHS == AddRHS)) in match()
1482 return L.match(AddLHS) && R.match(AddRHS) && S.match(ICmpLHS); in match()
1486 if (AddExpr.match(ICmpRHS) && (ICmpLHS == AddLHS || ICmpLHS == AddRHS)) in match()
1487 return L.match(AddLHS) && R.match(AddRHS) && S.match(ICmpRHS); in match()
/external/swiftshader/third_party/LLVM/lib/Transforms/InstCombine/
DInstCombineAndOrXor.cpp246 const APInt& AddRHS = cast<ConstantInt>(OpRHS)->getValue(); in OptAndOp() local
249 if ((AddRHS & (AndRHSV-1)) == 0) { in OptAndOp()
254 if ((AddRHS & AndRHSV) == 0) { // Bit is not set, noop in OptAndOp()
DInstructionCombining.cpp1236 if (ConstantInt *AddRHS = dyn_cast<ConstantInt>(I->getOperand(1))) { in visitSwitchInst() local
1243 AddRHS); in visitSwitchInst()
/external/llvm/lib/Transforms/InstCombine/
DInstructionCombining.cpp2205 ConstantInt *AddRHS = nullptr; in visitSwitchInst() local
2206 if (match(Cond, m_Add(m_Value(), m_ConstantInt(AddRHS)))) { in visitSwitchInst()
2218 Constant *NewCaseVal = ConstantExpr::getSub(LHS, AddRHS); in visitSwitchInst()
DInstCombineAndOrXor.cpp202 const APInt& AddRHS = OpRHS->getValue(); in OptAndOp() local
205 if ((AddRHS & (AndRHSV-1)) == 0) { in OptAndOp()
210 if ((AddRHS & AndRHSV) == 0) { // Bit is not set, noop in OptAndOp()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/InstCombine/
DInstructionCombining.cpp2353 ConstantInt *AddRHS; in visitSwitchInst() local
2354 if (match(Cond, m_Add(m_Value(Op0), m_ConstantInt(AddRHS)))) { in visitSwitchInst()
2357 Constant *NewCase = ConstantExpr::getSub(Case.getCaseValue(), AddRHS); in visitSwitchInst()
DInstCombineAndOrXor.cpp138 const APInt& AddRHS = OpRHS->getValue(); in OptAndOp() local
141 if ((AddRHS & (AndRHSV - 1)).isNullValue()) { in OptAndOp()
146 if ((AddRHS & AndRHSV).isNullValue()) { // Bit is not set, noop in OptAndOp()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DSIISelLowering.cpp7367 SDValue AddRHS = RHS; in performAddCombine() local
7374 AddRHS = DAG.getZExtOrTrunc(AddRHS, SL, MVT::i64); in performAddCombine()
7375 return getMad64_32(DAG, SL, VT, MulLHS, MulRHS, AddRHS, false); in performAddCombine()
7381 AddRHS = DAG.getSExtOrTrunc(AddRHS, SL, MVT::i64); in performAddCombine()
7382 return getMad64_32(DAG, SL, VT, MulLHS, MulRHS, AddRHS, true); in performAddCombine()
/external/llvm/lib/Analysis/
DScalarEvolution.cpp8392 const SCEVMulExpr *AddRHS = dyn_cast<SCEVMulExpr>(Add->getOperand(1)); in MatchNotExpr() local
8393 if (!AddRHS || AddRHS->getNumOperands() != 2 || in MatchNotExpr()
8394 !AddRHS->getOperand(0)->isAllOnesValue()) in MatchNotExpr()
8397 return AddRHS->getOperand(1); in MatchNotExpr()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Analysis/
DScalarEvolution.cpp9854 const SCEVMulExpr *AddRHS = dyn_cast<SCEVMulExpr>(Add->getOperand(1)); in MatchNotExpr() local
9855 if (!AddRHS || AddRHS->getNumOperands() != 2 || in MatchNotExpr()
9856 !AddRHS->getOperand(0)->isAllOnesValue()) in MatchNotExpr()
9859 return AddRHS->getOperand(1); in MatchNotExpr()