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Searched refs:AddrBaseReg (Results 1 – 25 of 26) sorted by relevance

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/external/llvm/lib/Target/X86/
DX86OptimizeLEAs.cpp174 return MemOpKey(&MI.getOperand(N + X86::AddrBaseReg), in getMemOpKey()
330 if (TII->getRegClass(Desc, MemOpNo + X86::AddrBaseReg, TRI, *MF) != in chooseBestLEA()
424 if (!isIdenticalOp(MI.getOperand(MemOpNo + X86::AddrBaseReg), MO)) in isReplaceable()
430 if (i != (unsigned)(MemOpNo + X86::AddrBaseReg) && in isReplaceable()
520 MI.getOperand(MemOpNo + X86::AddrBaseReg) in removeRedundantAddrCalc()
DX86AsmPrinter.cpp231 const MachineOperand &BaseReg = MI->getOperand(Op+X86::AddrBaseReg); in printLeaMemReference()
267 printOperand(P, MI, Op+X86::AddrBaseReg, O, Modifier); in printLeaMemReference()
296 const MachineOperand &BaseReg = MI->getOperand(Op+X86::AddrBaseReg); in printIntelMemReference()
312 printOperand(P, MI, Op+X86::AddrBaseReg, O, Modifier, AsmVariant); in printIntelMemReference()
DX86FixupLEAs.cpp254 unsigned SrcReg = LEA.getOperand(1 + X86::AddrBaseReg).getReg(); in isLEASimpleIncOrDec()
307 MachineOperand &p = MI.getOperand(AddrOffset + X86::AddrBaseReg); in processInstruction()
DX86CallFrameOptimization.cpp385 if (!I->getOperand(X86::AddrBaseReg).isReg() || in collectCallInfo()
386 (I->getOperand(X86::AddrBaseReg).getReg() != StackPtr) || in collectCallInfo()
DX86InstrInfo.h125 MI.getOperand(Op + X86::AddrBaseReg).isReg() && in isLeaMem()
DX86MCInstLower.cpp313 Inst.getOperand(AddrBase + X86::AddrBaseReg).isReg() && in SimplifyShortMoveForm()
338 (Inst.getOperand(AddrBase + X86::AddrBaseReg).getReg() != 0 || in SimplifyShortMoveForm()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/MCTargetDesc/
DX86MCCodeEmitter.cpp68 const MCOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is16BitMemOperand()
210 const MCOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is32BitMemOperand()
231 const MCOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is64BitMemOperand()
384 const MCOperand &Base = MI.getOperand(Op+X86::AddrBaseReg); in emitMemModRMByte()
750 unsigned BaseRegEnc = getX86RegEncoding(MI, MemOperand + X86::AddrBaseReg); in EmitVEXOpcodePrefix()
795 unsigned BaseRegEnc = getX86RegEncoding(MI, MemOperand + X86::AddrBaseReg); in EmitVEXOpcodePrefix()
810 unsigned BaseRegEnc = getX86RegEncoding(MI, MemOperand + X86::AddrBaseReg); in EmitVEXOpcodePrefix()
826 unsigned BaseRegEnc = getX86RegEncoding(MI, MemOperand + X86::AddrBaseReg); in EmitVEXOpcodePrefix()
848 unsigned BaseRegEnc = getX86RegEncoding(MI, MemOperand + X86::AddrBaseReg); in EmitVEXOpcodePrefix()
1068 REX |= isREXExtendedReg(MI, MemOperand+X86::AddrBaseReg) << 0; // REX.B in DetermineREXPrefix()
[all …]
DX86BaseInfo.h33 AddrBaseReg = 0, enumerator
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/InstPrinter/
DX86IntelInstPrinter.cpp74 const MCOperand &BaseReg = MI->getOperand(Op+X86::AddrBaseReg); in printMemReference()
86 printOperand(MI, Op+X86::AddrBaseReg, O); in printMemReference()
DX86ATTInstPrinter.cpp113 const MCOperand &BaseReg = MI->getOperand(Op + X86::AddrBaseReg); in printMemReference()
134 printOperand(MI, Op + X86::AddrBaseReg, O); in printMemReference()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86OptimizeLEAs.cpp192 return MemOpKey(&MI.getOperand(N + X86::AddrBaseReg), in getMemOpKey()
357 if (TII->getRegClass(Desc, MemOpNo + X86::AddrBaseReg, TRI, *MF) != in chooseBestLEA()
451 if (!isIdenticalOp(MI.getOperand(MemOpNo + X86::AddrBaseReg), MO)) in isReplaceable()
457 if (i != (unsigned)(MemOpNo + X86::AddrBaseReg) && in isReplaceable()
547 MI.getOperand(MemOpNo + X86::AddrBaseReg) in removeRedundantAddrCalc()
DX86AsmPrinter.cpp259 const MachineOperand &BaseReg = MI->getOperand(Op+X86::AddrBaseReg); in printLeaMemReference()
295 printOperand(P, MI, Op+X86::AddrBaseReg, O, Modifier); in printLeaMemReference()
324 const MachineOperand &BaseReg = MI->getOperand(Op+X86::AddrBaseReg); in printIntelMemReference()
340 printOperand(P, MI, Op+X86::AddrBaseReg, O, Modifier, AsmVariant); in printIntelMemReference()
DX86CallFrameOptimization.cpp425 if (!I->getOperand(X86::AddrBaseReg).isReg() || in collectCallInfo()
426 (I->getOperand(X86::AddrBaseReg).getReg() != StackPtr) || in collectCallInfo()
DX86FixupLEAs.cpp334 unsigned SrcReg = LEA.getOperand(1 + X86::AddrBaseReg).getReg(); in isLEASimpleIncOrDec()
387 MachineOperand &p = MI.getOperand(AddrOffset + X86::AddrBaseReg); in processInstruction()
DX86SpeculativeLoadHardening.cpp1443 MI.getOperand(MemRefBeginIdx + X86::AddrBaseReg); in tracePredStateThroughBlocksAndHarden()
1523 MI.getOperand(MemRefBeginIdx + X86::AddrBaseReg); in tracePredStateThroughBlocksAndHarden()
1913 UseMI.getOperand(MemRefBeginIdx + X86::AddrBaseReg); in sinkPostLoadHardenedInst()
DX86InstrInfo.h151 MI.getOperand(Op + X86::AddrBaseReg).isReg() && in isLeaMem()
DX86AvoidStoreForwardingBlocks.cpp305 return MI->getOperand(AddrOffset + X86::AddrBaseReg); in getBaseOperand()
DX86InstrInfo.cpp196 if (MI.getOperand(Op + X86::AddrBaseReg).isFI() && in isFrameOperand()
203 FrameIndex = MI.getOperand(Op + X86::AddrBaseReg).getIndex(); in isFrameOperand()
539 if (MI.getOperand(1 + X86::AddrBaseReg).isReg() && in isReallyTriviallyReMaterializable()
544 unsigned BaseReg = MI.getOperand(1 + X86::AddrBaseReg).getReg(); in isReallyTriviallyReMaterializable()
564 if (!MI.getOperand(1 + X86::AddrBaseReg).isReg()) in isReallyTriviallyReMaterializable()
566 unsigned BaseReg = MI.getOperand(1 + X86::AddrBaseReg).getReg(); in isReallyTriviallyReMaterializable()
3255 MachineOperand &BaseMO = MemOp.getOperand(MemRefBegin + X86::AddrBaseReg); in getMemOpBaseRegImmOfs()
5794 if (!HasSameOp(X86::AddrBaseReg) || !HasSameOp(X86::AddrScaleAmt) || in areLoadsFromSameBasePtr()
DX86MCInstLower.cpp343 Inst.getOperand(AddrBase + X86::AddrBaseReg).isReg() && in SimplifyShortMoveForm()
367 (Inst.getOperand(AddrBase + X86::AddrBaseReg).getReg() != 0 || in SimplifyShortMoveForm()
/external/llvm/lib/Target/X86/MCTargetDesc/
DX86MCCodeEmitter.cpp60 const MCOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is16BitMemOperand()
206 const MCOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is32BitMemOperand()
225 const MCOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is64BitMemOperand()
355 const MCOperand &Base = MI.getOperand(Op+X86::AddrBaseReg); in emitMemModRMByte()
720 unsigned BaseRegEnc = getX86RegEncoding(MI, MemOperand + X86::AddrBaseReg); in EmitVEXOpcodePrefix()
766 unsigned BaseRegEnc = getX86RegEncoding(MI, MemOperand + X86::AddrBaseReg); in EmitVEXOpcodePrefix()
798 unsigned BaseRegEnc = getX86RegEncoding(MI, MemOperand + X86::AddrBaseReg); in EmitVEXOpcodePrefix()
996 REX |= isX86_64ExtendedReg(MI, MemOperand+X86::AddrBaseReg) << 0; // REX.B in DetermineREXPrefix()
1006 REX |= isX86_64ExtendedReg(MI, MemOperand+X86::AddrBaseReg) << 0; // REX.B in DetermineREXPrefix()
1016 REX |= isX86_64ExtendedReg(MI, MemOperand+X86::AddrBaseReg) << 0; // REX.B in DetermineREXPrefix()
DX86BaseInfo.h33 AddrBaseReg = 0, enumerator
/external/llvm/lib/Target/X86/InstPrinter/
DX86IntelInstPrinter.cpp159 const MCOperand &BaseReg = MI->getOperand(Op+X86::AddrBaseReg); in printMemReference()
175 printOperand(MI, Op+X86::AddrBaseReg, O); in printMemReference()
DX86ATTInstPrinter.cpp197 const MCOperand &BaseReg = MI->getOperand(Op + X86::AddrBaseReg); in printMemReference()
222 printOperand(MI, Op + X86::AddrBaseReg, O); in printMemReference()
/external/swiftshader/third_party/LLVM/lib/Target/X86/MCTargetDesc/
DX86MCCodeEmitter.cpp162 const MCOperand &BaseReg = MI.getOperand(Op+X86::AddrBaseReg); in Is32BitMemOperand()
247 const MCOperand &Base = MI.getOperand(Op+X86::AddrBaseReg); in EmitMemModRMByte()
505 if (X86II::isX86_64ExtendedReg(MI.getOperand(X86::AddrBaseReg).getReg())) in EmitVEXOpcodePrefix()
536 MI.getOperand(MemAddrOffset+X86::AddrBaseReg).getReg())) in EmitVEXOpcodePrefix()
549 if (X86II::isX86_64ExtendedReg(MI.getOperand(X86::AddrBaseReg).getReg())) in EmitVEXOpcodePrefix()
DX86BaseInfo.h32 AddrBaseReg = 0, enumerator

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