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Searched refs:AddrOpc (Results 1 – 18 of 18) sorted by relevance

/external/llvm/lib/Target/ARM/MCTargetDesc/
DARMAddressingModes.h36 enum AddrOpc { enum
41 static inline const char *getAddrOpcStr(AddrOpc Op) { in getAddrOpcStr()
407 static inline unsigned getAM2Opc(AddrOpc Opc, unsigned Imm12, ShiftOpc SO,
416 static inline AddrOpc getAM2Op(unsigned AM2Opc) { in getAM2Op()
442 static inline unsigned getAM3Opc(AddrOpc Opc, unsigned char Offset,
450 static inline AddrOpc getAM3Op(unsigned AM3Opc) { in getAM3Op()
492 static inline unsigned getAM5Opc(AddrOpc Opc, unsigned char Offset) { in getAM5Opc()
499 static inline AddrOpc getAM5Op(unsigned AM5Opc) { in getAM5Op()
515 static inline unsigned getAM5FP16Opc(AddrOpc Opc, unsigned char Offset) { in getAM5FP16Opc()
522 static inline AddrOpc getAM5FP16Op(unsigned AM5Opc) { in getAM5FP16Op()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/MCTargetDesc/
DARMAddressingModes.h36 enum AddrOpc { enum
41 inline const char *getAddrOpcStr(AddrOpc Op) { return Op == sub ? "-" : ""; } in getAddrOpcStr()
397 inline unsigned getAM2Opc(AddrOpc Opc, unsigned Imm12, ShiftOpc SO,
406 inline AddrOpc getAM2Op(unsigned AM2Opc) { in getAM2Op()
429 inline unsigned getAM3Opc(AddrOpc Opc, unsigned char Offset,
435 inline AddrOpc getAM3Op(unsigned AM3Opc) { in getAM3Op()
473 inline unsigned getAM5Opc(AddrOpc Opc, unsigned char Offset) { in getAM5Opc()
478 inline AddrOpc getAM5Op(unsigned AM5Opc) { in getAM5Op()
494 inline unsigned getAM5FP16Opc(AddrOpc Opc, unsigned char Offset) { in getAM5FP16Opc()
501 inline AddrOpc getAM5FP16Op(unsigned AM5Opc) { in getAM5FP16Op()
/external/swiftshader/third_party/LLVM/lib/Target/ARM/MCTargetDesc/
DARMAddressingModes.h35 enum AddrOpc { enum
40 static inline const char *getAddrOpcStr(AddrOpc Op) { in getAddrOpcStr()
406 static inline unsigned getAM2Opc(AddrOpc Opc, unsigned Imm12, ShiftOpc SO,
415 static inline AddrOpc getAM2Op(unsigned AM2Opc) { in getAM2Op()
441 static inline unsigned getAM3Opc(AddrOpc Opc, unsigned char Offset,
449 static inline AddrOpc getAM3Op(unsigned AM3Opc) { in getAM3Op()
491 static inline unsigned getAM5Opc(AddrOpc Opc, unsigned char Offset) { in getAM5Opc()
498 static inline AddrOpc getAM5Op(unsigned AM5Opc) { in getAM5Op()
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMISelDAGToDAG.cpp500 ARM_AM::AddrOpc AddSub = ARM_AM::add; in SelectLdStSOReg()
531 ARM_AM::AddrOpc AddSub = N.getOpcode() == ISD::SUB ? ARM_AM::sub:ARM_AM::add; in SelectLdStSOReg()
600 ARM_AM::AddrOpc AddSub = ARM_AM::add; in SelectAddrMode2Worker()
648 ARM_AM::AddrOpc AddSub = ARM_AM::add; in SelectAddrMode2Worker()
671 ARM_AM::AddrOpc AddSub = N.getOpcode() != ISD::SUB ? ARM_AM::add:ARM_AM::sub; in SelectAddrMode2Worker()
730 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode2OffsetReg()
766 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode2OffsetImmPre()
786 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode2OffsetImm()
838 ARM_AM::AddrOpc AddSub = ARM_AM::add; in SelectAddrMode3()
859 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode3Offset()
[all …]
DARMLoadStoreOptimizer.cpp764 ARM_AM::AddrOpc Mode) { in getPreIndexedLoadStoreOpcode()
790 ARM_AM::AddrOpc Mode) { in getPostIndexedLoadStoreOpcode()
846 ARM_AM::AddrOpc AddSub = ARM_AM::add; in MergeBaseUpdateLoadStore()
1553 ARM_AM::AddrOpc AddSub = ARM_AM::add; in CanFormLdStDWord()
/external/llvm/lib/Target/ARM/
DARMISelDAGToDAG.cpp660 ARM_AM::AddrOpc AddSub = ARM_AM::add; in SelectLdStSOReg()
691 ARM_AM::AddrOpc AddSub = N.getOpcode() == ISD::SUB ? ARM_AM::sub:ARM_AM::add; in SelectLdStSOReg()
771 ARM_AM::AddrOpc AddSub = ARM_AM::add; in SelectAddrMode2Worker()
822 ARM_AM::AddrOpc AddSub = ARM_AM::add; in SelectAddrMode2Worker()
845 ARM_AM::AddrOpc AddSub = N.getOpcode() != ISD::SUB ? ARM_AM::add:ARM_AM::sub; in SelectAddrMode2Worker()
905 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode2OffsetReg()
941 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode2OffsetImmPre()
961 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode2OffsetImm()
1017 ARM_AM::AddrOpc AddSub = ARM_AM::add; in SelectAddrMode3()
1040 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode3Offset()
[all …]
DARMLoadStoreOptimizer.cpp209 ARM_AM::AddrOpc Op = isAM3 ? ARM_AM::getAM3Op(OffField) in getMemoryOpOffset()
1279 ARM_AM::AddrOpc Mode) { in getPreIndexedLoadStoreOpcode()
1304 ARM_AM::AddrOpc Mode) { in getPostIndexedLoadStoreOpcode()
1377 ARM_AM::AddrOpc AddSub = Offset < 0 ? ARM_AM::sub : ARM_AM::add; in MergeBaseUpdateLoadStore()
2109 ARM_AM::AddrOpc AddSub = ARM_AM::add; in CanFormLdStDWord()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMLoadStoreOptimizer.cpp234 ARM_AM::AddrOpc Op = isAM3 ? ARM_AM::getAM3Op(OffField) in getMemoryOpOffset()
1313 ARM_AM::AddrOpc Mode) { in getPreIndexedLoadStoreOpcode()
1338 ARM_AM::AddrOpc Mode) { in getPostIndexedLoadStoreOpcode()
1411 ARM_AM::AddrOpc AddSub = Offset < 0 ? ARM_AM::sub : ARM_AM::add; in MergeBaseUpdateLoadStore()
2148 ARM_AM::AddrOpc AddSub = ARM_AM::add; in CanFormLdStDWord()
DARMISelDAGToDAG.cpp646 ARM_AM::AddrOpc AddSub = ARM_AM::add; in SelectLdStSOReg()
677 ARM_AM::AddrOpc AddSub = N.getOpcode() == ISD::SUB ? ARM_AM::sub:ARM_AM::add; in SelectLdStSOReg()
751 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode2OffsetReg()
787 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode2OffsetImmPre()
807 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode2OffsetImm()
863 ARM_AM::AddrOpc AddSub = ARM_AM::add; in SelectAddrMode3()
886 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode3Offset()
933 ARM_AM::AddrOpc AddSub = ARM_AM::add; in IsAddressingMode5()
/external/swiftshader/third_party/LLVM/lib/Target/ARM/AsmParser/
DARMAsmParser.cpp1167 ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; in addAddrMode2Operands()
1188 ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; in addAM2OffsetImmOperands()
1201 ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; in addAddrMode3Operands()
1229 ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; in addAM3OffsetOperands()
1242 ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; in addAddrMode5Operands()
1407 ARM_AM::AddrOpc opc = PostIdxReg.isAdd ? ARM_AM::add : ARM_AM::sub; in addPostIdxRegShiftedOperands()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/
DHexagonISelDAGToDAGHVX.cpp945 unsigned AddrOpc = Addr.getOpcode(); in selectVectorConstants() local
946 if (AddrOpc == HexagonISD::AT_PCREL || AddrOpc == HexagonISD::CP) in selectVectorConstants()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/InstPrinter/
DARMInstPrinter.cpp508 ARM_AM::AddrOpc op = ARM_AM::getAM3Op(MO3.getImm()); in printAM3PreOrOffsetIndexOp()
604 ARM_AM::AddrOpc Op = ARM_AM::getAM5Op(MO2.getImm()); in printAddrMode5Operand()
/external/llvm/lib/Target/ARM/InstPrinter/
DARMInstPrinter.cpp496 ARM_AM::AddrOpc op = ARM_AM::getAM3Op(MO3.getImm()); in printAM3PreOrOffsetIndexOp()
592 ARM_AM::AddrOpc Op = ARM_AM::getAM5Op(MO2.getImm()); in printAddrMode5Operand()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/AsmParser/
DARMAsmParser.cpp2394 ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; in addAddrMode2Operands()
2415 ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; in addAM2OffsetImmOperands()
2438 ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; in addAddrMode3Operands()
2466 ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; in addAM3OffsetOperands()
2488 ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; in addAddrMode5Operands()
2510 ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; in addAddrMode5FP16Operands()
2693 ARM_AM::AddrOpc opc = PostIdxReg.isAdd ? ARM_AM::add : ARM_AM::sub; in addPostIdxRegShiftedOperands()
/external/llvm/lib/Target/ARM/AsmParser/
DARMAsmParser.cpp2122 ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; in addAddrMode2Operands()
2143 ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; in addAM2OffsetImmOperands()
2166 ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; in addAddrMode3Operands()
2194 ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; in addAM3OffsetOperands()
2216 ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; in addAddrMode5Operands()
2238 ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; in addAddrMode5FP16Operands()
2421 ARM_AM::AddrOpc opc = PostIdxReg.isAdd ? ARM_AM::add : ARM_AM::sub; in addPostIdxRegShiftedOperands()
/external/swiftshader/third_party/LLVM/lib/Target/ARM/Disassembler/
DARMDisassembler.cpp1389 ARM_AM::AddrOpc Op = ARM_AM::add; in DecodeAddrMode2IdxInstruction()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/Disassembler/
DARMDisassembler.cpp1523 ARM_AM::AddrOpc Op = ARM_AM::add; in DecodeAddrMode2IdxInstruction()
/external/llvm/lib/Target/ARM/Disassembler/
DARMDisassembler.cpp1524 ARM_AM::AddrOpc Op = ARM_AM::add; in DecodeAddrMode2IdxInstruction()