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Searched refs:AsmName (Results 1 – 11 of 11) sorted by relevance

/external/swiftshader/third_party/LLVM/utils/TableGen/
DAsmWriterEmitter.cpp470 std::string AsmName; in emitRegisterNameString() local
474 AsmName = Reg.TheDef->getValueAsString("AsmName"); in emitRegisterNameString()
475 if (AsmName.empty()) in emitRegisterNameString()
476 AsmName = Reg.getName(); in emitRegisterNameString()
495 AsmName = AltNames[Idx]; in emitRegisterNameString()
499 O << StringTable.GetOrAddStringOffset(AsmName); in emitRegisterNameString()
590 std::string AsmName = Inst.TheDef->getName(); in EmitGetInstructionName() local
594 O << StringTable.GetOrAddStringOffset(AsmName) << ", "; in EmitGetInstructionName()
/external/llvm/utils/TableGen/
DAsmWriterEmitter.cpp499 std::string &AsmName = AsmNames[i++]; in emitRegisterNameString() local
504 AsmName = Reg.TheDef->getValueAsString("AsmName"); in emitRegisterNameString()
505 if (AsmName.empty()) in emitRegisterNameString()
506 AsmName = Reg.getName(); in emitRegisterNameString()
525 AsmName = AltNames[Idx]; in emitRegisterNameString()
528 StringTable.add(AsmName); in emitRegisterNameString()
/external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/
DAsmWriterEmitter.cpp506 std::string &AsmName = AsmNames[i++]; in emitRegisterNameString() local
511 AsmName = Reg.TheDef->getValueAsString("AsmName"); in emitRegisterNameString()
512 if (AsmName.empty()) in emitRegisterNameString()
513 AsmName = Reg.getName(); in emitRegisterNameString()
532 AsmName = AltNames[Idx]; in emitRegisterNameString()
535 StringTable.add(AsmName); in emitRegisterNameString()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DVOP2Instructions.td773 multiclass VOP2be_Real_e32e64_vi_only <bits<6> op, string OpName, string AsmName> {
778 let AsmString = AsmName # ps.AsmOperands;
785 let AsmString = AsmName # ps.AsmOperands;
792 let AsmString = AsmName # ps.AsmOperands;
795 VOP2_DPP<op, !cast<VOP2_Pseudo>(OpName#"_e32"), AsmName>;
801 multiclass VOP2be_Real_e32e64_gfx9 <bits<6> op, string OpName, string AsmName> {
806 let AsmString = AsmName # ps.AsmOperands;
813 let AsmString = AsmName # ps.AsmOperands;
820 let AsmString = AsmName # ps.AsmOperands;
823 VOP2_DPP<op, !cast<VOP2_Pseudo>(OpName#"_e32"), AsmName> {
DVOP3Instructions.td691 multiclass VOP3_F16_Real_gfx9<bits<10> op, string OpName, string AsmName> {
695 let AsmString = AsmName # ps.AsmOperands;
699 multiclass VOP3OpSel_F16_Real_gfx9<bits<10> op, string AsmName> {
703 let AsmString = AsmName # ps.AsmOperands;
707 multiclass VOP3Interp_F16_Real_gfx9<bits<10> op, string OpName, string AsmName> {
711 let AsmString = AsmName # ps.AsmOperands;
715 multiclass VOP3_Real_gfx9<bits<10> op, string AsmName> {
719 let AsmString = AsmName # ps.AsmOperands;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/RISCV/
DRISCVRegisterInfo.td25 // Because RISCVReg64 register have AsmName and AltNames that alias with their
33 let AsmName = subreg.AsmName;
/external/swiftshader/third_party/LLVM/include/llvm/Target/
DTarget.td40 string AsmName = n;
221 // the AsmName and Dwarf numbers are cleared.
/external/llvm/include/llvm/Target/
DTarget.td82 string AsmName = n;
273 // the AsmName and Dwarf numbers are cleared.
/external/swiftshader/third_party/llvm-7.0/llvm/docs/
DWritingAnLLVMBackend.rst352 string AsmName = n;
396 const char *AsmName; // Assembly language name for the register
405 names for the register (in the ``AsmName`` and ``Name`` fields of
/external/llvm/docs/
DWritingAnLLVMBackend.rst352 string AsmName = n;
396 const char *AsmName; // Assembly language name for the register
405 names for the register (in the ``AsmName`` and ``Name`` fields of
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Target/
DTarget.td132 string AsmName = n;
346 // the AsmName and Dwarf numbers are cleared.