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Searched refs:BF_ANADIG_PLL_ENET2_DIV_SELECT (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/include/asm/arch-mx6/
Dcrm_regs.h1240 #define BF_ANADIG_PLL_ENET2_DIV_SELECT(v) \ macro
/external/u-boot/arch/arm/mach-imx/mx6/
Dclock.c926 reg |= BF_ANADIG_PLL_ENET2_DIV_SELECT(freq); in enable_fec_anatop_clock()