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Searched refs:BITCAST (Results 1 – 25 of 136) sorted by relevance

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/external/mesa3d/src/gallium/drivers/swr/rasterizer/jitter/
Dfetch_jit.cpp166 pVtxOut = BITCAST(pVtxOut, PointerType::get(VectorType::get(mFP32Ty, mVWidth16), 0)); in Create()
168 pVtxOut = BITCAST(pVtxOut, PointerType::get(VectorType::get(mFP32Ty, mVWidth), 0)); in Create()
171 pVtxOut = BITCAST(pVtxOut, PointerType::get(VectorType::get(mFP32Ty, mVWidth), 0)); in Create()
195 indices = BITCAST(indices, Type::getInt8PtrTy(JM()->mContext, 0)); in Create()
201 …vIndices = LOAD(BITCAST(indices, PointerType::get(VectorType::get(mInt8Ty, mpJitMgr->mVWidth), 0))… in Create()
204 …vIndices2 = LOAD(BITCAST(indices2, PointerType::get(VectorType::get(mInt8Ty, mpJitMgr->mVWidth), 0… in Create()
210 pLastIndex = BITCAST(pLastIndex, Type::getInt8PtrTy(JM()->mContext, 0)); in Create()
213 pLastIndex = BITCAST(pLastIndex, Type::getInt8PtrTy(JM()->mContext, 0)); in Create()
219 indices = BITCAST(indices, Type::getInt16PtrTy(JM()->mContext, 0)); in Create()
225 …vIndices = LOAD(BITCAST(indices, PointerType::get(VectorType::get(mInt16Ty, mpJitMgr->mVWidth), 0)… in Create()
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Dbuilder_misc.cpp439 mask = BITCAST(mask,VectorType::get(mInt32Ty,mVWidth)); in MASKLOADD()
441 mask = BITCAST(mask,VectorType::get(mFP32Ty,mVWidth)); in MASKLOADD()
444 vResult = BITCAST(CALL(func,{src,mask}), VectorType::get(mInt32Ty,mVWidth)); in MASKLOADD()
600 Value *mask = BITCAST(VMASK(vMask), mSimdFP32Ty); in GATHERPS()
621 loadAddress = BITCAST(loadAddress,PointerType::get(mFP32Ty,0)); in GATHERPS()
645 Value *mask = BITCAST(vMask, mInt16Ty); in GATHERPS_16()
703 loadAddress = BITCAST(loadAddress, PointerType::get(mInt32Ty, 0)); in GATHERDD()
727 Value *mask = BITCAST(vMask, mInt16Ty); in GATHERDD_16()
766 …vMask = BITCAST(S_EXT(vMask, VectorType::get(mInt64Ty, mVWidth/2)), VectorType::get(mDoubleTy, mVW… in GATHERPD()
786 loadAddress = BITCAST(loadAddress,PointerType::get(mDoubleTy,0)); in GATHERPD()
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Dstreamout_jit.cpp147 pAttrib = BITCAST(pAttrib, simd4PtrTy); in buildDecl()
155 Value* pOut = BITCAST(pOutBuffers[decl.bufferIndex], PointerType::get(mInt8Ty, 0)); in buildDecl()
158 Value* src = BITCAST(vpackedAttrib, simd4Ty); in buildDecl()
162 mask = BITCAST(mask, VectorType::get(IRB()->getInt32Ty(), 4)); in buildDecl()
Dblend_jit.cpp199 src[c] = BITCAST(VIMMED1((int)info.defaults[c]), mSimdFP32Ty); in ApplyDefaults()
212 … src[info.swizzle[c]] = BITCAST(VIMMED1((int)info.defaults[info.swizzle[c]]), mSimdFP32Ty); in ApplyUnusedDefaults()
479 pRef = BITCAST(pRef, mSimdFP32Ty); in AlphaTest()
698 src[i] = BITCAST(src[i], mSimdInt32Ty); in Create()
699 dst[i] = BITCAST(dst[i], mSimdInt32Ty); in Create()
745 result[i] = BITCAST(result[i], mSimdFP32Ty); in Create()
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
DLegalizeTypesGeneric.cpp57 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
58 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
64 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
65 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
71 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
72 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
77 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
78 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
91 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
92 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
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DLegalizeVectorOps.cpp255 Operands[j] = DAG.getNode(ISD::BITCAST, dl, NVT, Op.getOperand(j)); in PromoteVectorOp()
262 return DAG.getNode(ISD::BITCAST, dl, VT, Op); in PromoteVectorOp()
287 Op1 = DAG.getNode(ISD::BITCAST, DL, VT, Op1); in ExpandVSELECT()
288 Op2 = DAG.getNode(ISD::BITCAST, DL, VT, Op2); in ExpandVSELECT()
DLegalizeVectorTypes.cpp51 case ISD::BITCAST: R = ScalarizeVecRes_BITCAST(N); break; in ScalarizeVectorResult()
140 return DAG.getNode(ISD::BITCAST, N->getDebugLoc(), in ScalarizeVecRes_BITCAST()
313 case ISD::BITCAST: in ScalarizeVectorOperand()
347 return DAG.getNode(ISD::BITCAST, N->getDebugLoc(), in ScalarizeVecOp_BITCAST()
423 case ISD::BITCAST: SplitVecRes_BITCAST(N, Lo, Hi); break; in SplitVectorResult()
542 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo); in SplitVecRes_BITCAST()
543 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi); in SplitVecRes_BITCAST()
551 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo); in SplitVecRes_BITCAST()
552 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi); in SplitVecRes_BITCAST()
566 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo); in SplitVecRes_BITCAST()
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/external/llvm/lib/CodeGen/SelectionDAG/
DLegalizeTypesGeneric.cpp63 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
64 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
75 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
76 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
83 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
84 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
89 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
90 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
100 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
101 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
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DLegalizeVectorOps.cpp418 Operands[j] = DAG.getNode(ISD::BITCAST, dl, NVT, Op.getOperand(j)); in Promote()
429 return DAG.getNode(ISD::BITCAST, dl, VT, Op); in Promote()
754 Op1 = DAG.getNode(ISD::BITCAST, DL, MaskTy, Op1); in ExpandSELECT()
755 Op2 = DAG.getNode(ISD::BITCAST, DL, MaskTy, Op2); in ExpandSELECT()
764 return DAG.getNode(ISD::BITCAST, DL, Op.getValueType(), Val); in ExpandSELECT()
808 ISD::BITCAST, DL, VT, in ExpandANY_EXTEND_VECTOR_INREG()
859 return DAG.getNode(ISD::BITCAST, DL, VT, in ExpandZERO_EXTEND_VECTOR_INREG()
883 Op = DAG.getNode(ISD::BITCAST, DL, ByteVT, Op.getOperand(0)); in ExpandBSWAP()
885 return DAG.getNode(ISD::BITCAST, DL, VT, Op); in ExpandBSWAP()
911 Op = DAG.getNode(ISD::BITCAST, DL, ByteVT, Op.getOperand(0)); in ExpandBITREVERSE()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/
DLegalizeTypesGeneric.cpp63 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
64 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
75 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
76 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
83 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
84 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
89 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
90 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
100 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST()
101 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
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DLegalizeVectorOps.cpp490 Operands[j] = DAG.getNode(ISD::BITCAST, dl, NVT, Op.getOperand(j)); in Promote()
501 return DAG.getNode(ISD::BITCAST, dl, VT, Op); in Promote()
803 Op1 = DAG.getNode(ISD::BITCAST, DL, MaskTy, Op1); in ExpandSELECT()
804 Op2 = DAG.getNode(ISD::BITCAST, DL, MaskTy, Op2); in ExpandSELECT()
813 return DAG.getNode(ISD::BITCAST, DL, Op.getValueType(), Val); in ExpandSELECT()
857 ISD::BITCAST, DL, VT, in ExpandANY_EXTEND_VECTOR_INREG()
908 return DAG.getNode(ISD::BITCAST, DL, VT, in ExpandZERO_EXTEND_VECTOR_INREG()
932 Op = DAG.getNode(ISD::BITCAST, DL, ByteVT, Op.getOperand(0)); in ExpandBSWAP()
934 return DAG.getNode(ISD::BITCAST, DL, VT, Op); in ExpandBSWAP()
960 Op = DAG.getNode(ISD::BITCAST, DL, ByteVT, Op.getOperand(0)); in ExpandBITREVERSE()
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/GlobalISel/
Dlegalize-bitcast.mir20 ; CHECK: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[COPY]](s32)
21 ; CHECK: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[BITCAST]](<2 x s16>)
Dregbankselect-bitcast.mir14 ; CHECK: [[BITCAST:%[0-9]+]]:sgpr(s32) = G_BITCAST [[COPY]](s32)
28 ; CHECK: [[BITCAST:%[0-9]+]]:vgpr(s32) = G_BITCAST [[COPY]](s32)
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/SystemZ/
Ddag-combine-03.ll2 ; BITCAST nodes are involved on a big-endian target.
19 ; value. Test that the BITCAST nodes in the DAG when computing KnownBits is
/external/llvm/test/CodeGen/X86/
Dvshift-6.ll12 ; B = BITCAST MVT::v16i8, A
16 ; D = BITCAST MVT::v16i8, C
/external/llvm/test/Transforms/PGOProfile/
Dicp_vararg.ll16 ; ICALL-PROM: [[BITCAST:%[0-9]+]] = bitcast i32 (i32, ...)* %tmp to i8*
17 ; ICALL-PROM: [[CMP:%[0-9]+]] = icmp eq i8* [[BITCAST]], bitcast (i32 (i32, ...)* @va_func to i8*)
Dindirect_call_promotion.ll38 ; ICALL-PROM: [[BITCAST:%[0-9]+]] = bitcast i32 ()* %tmp to i8*
39 ; ICALL-PROM: [[CMP:%[0-9]+]] = icmp eq i8* [[BITCAST]], bitcast (i32 ()* @func4 to i8*)
Dicp_covariant_call_return.ll25 ; ICALL-PROM: [[BITCAST:%[0-9]+]] = bitcast %struct.Base* (%struct.B*)* %tmp3 to i8*
26 ; ICALL-PROM: [[CMP:%[0-9]+]] = icmp eq i8* [[BITCAST]], bitcast (%struct.Derived* (%struct.D*)* @…
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/GlobalISel/
Dlegalize-simple.mir74 ; CHECK: [[BITCAST:%[0-9]+]]:_(<2 x s32>) = G_BITCAST [[COPY]](s64)
75 ; CHECK: [[BITCAST1:%[0-9]+]]:_(s64) = G_BITCAST [[BITCAST]](<2 x s32>)
148 ; CHECK: [[BITCAST:%[0-9]+]]:_(<2 x s64>) = G_BITCAST [[MV]](s128)
149 ; CHECK: $q0 = COPY [[BITCAST]](<2 x s64>)
/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/
DSPUISelLowering.cpp351 setOperationAction(ISD::BITCAST, MVT::i32, Legal); in SPUTargetLowering()
352 setOperationAction(ISD::BITCAST, MVT::f32, Legal); in SPUTargetLowering()
353 setOperationAction(ISD::BITCAST, MVT::i64, Legal); in SPUTargetLowering()
354 setOperationAction(ISD::BITCAST, MVT::f64, Legal); in SPUTargetLowering()
678 DAG.getNode(ISD::BITCAST, dl, vecVT, result)); in LowerLOAD()
691 ones = DAG.getNode(ISD::BITCAST, dl, MVT::i128, ones); in LowerLOAD()
717 result = DAG.getNode(ISD::BITCAST, dl, vecVT, in LowerLOAD()
890 DAG.getNode(ISD::BITCAST, dl, in LowerSTORE()
919 ones = DAG.getNode(ISD::BITCAST, dl, MVT::i128, ones); in LowerSTORE()
933 Value = DAG.getNode(ISD::BITCAST, dl, MVT::i128, Value); in LowerSTORE()
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/external/llvm/lib/Target/AMDGPU/
DAMDGPUISelLowering.cpp474 setTargetDAGCombine(ISD::BITCAST); in AMDGPUTargetLowering()
1031 SDValue Vec = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Op); in split64BitValue()
1045 SDValue Vec = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Op); in getLoHalf64()
1053 SDValue Vec = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Op); in getHiHalf64()
1365 Results.push_back(DAG.getNode(ISD::BITCAST, DL, MVT::i64, DIV)); in LowerUDIVREM64()
1366 Results.push_back(DAG.getNode(ISD::BITCAST, DL, MVT::i64, REM)); in LowerUDIVREM64()
1376 REM = DAG.getNode(ISD::BITCAST, DL, MVT::i64, REM); in LowerUDIVREM64()
1407 DIV = DAG.getNode(ISD::BITCAST, DL, MVT::i64, DIV); in LowerUDIVREM64()
1652 SDValue VecSrc = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Src); in LowerFTRUNC()
1668 SignBit64 = DAG.getNode(ISD::BITCAST, SL, MVT::i64, SignBit64); in LowerFTRUNC()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DAMDGPUISelLowering.cpp520 setTargetDAGCombine(ISD::BITCAST); in AMDGPUTargetLowering()
599 case ISD::BITCAST: in hasSourceMods()
1225 SDValue Lo = DAG.getNode(ISD::BITCAST, SL, MVT::i32, Op.getOperand(0)); in LowerCONCAT_VECTORS()
1226 SDValue Hi = DAG.getNode(ISD::BITCAST, SL, MVT::i32, Op.getOperand(1)); in LowerCONCAT_VECTORS()
1229 return DAG.getNode(ISD::BITCAST, SL, VT, BV); in LowerCONCAT_VECTORS()
1328 SDValue Vec = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Op); in split64BitValue()
1342 SDValue Vec = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Op); in getLoHalf64()
1350 SDValue Vec = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Op); in getHiHalf64()
1583 Results.push_back(DAG.getNode(ISD::BITCAST, DL, MVT::i64, DIV)); in LowerUDIVREM64()
1584 Results.push_back(DAG.getNode(ISD::BITCAST, DL, MVT::i64, REM)); in LowerUDIVREM64()
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DSIISelLowering.cpp249 case ISD::BITCAST: in SITargetLowering()
483 case ISD::BITCAST: in SITargetLowering()
1267 ArgVal = DAG.getNode(ISD::BITCAST, SL, MemVT, ArgVal); in lowerKernargMemParameter()
1935 Val = DAG.getNode(ISD::BITCAST, DL, ValVT, Val); in LowerFormalArguments()
2120 Arg = DAG.getNode(ISD::BITCAST, DL, VA.getLocVT(), Arg); in LowerReturn()
2199 Val = DAG.getNode(ISD::BITCAST, DL, VA.getValVT(), Val); in LowerCallResult()
2550 Arg = DAG.getNode(ISD::BITCAST, DL, VA.getLocVT(), Arg); in LowerCall()
3671 return DAG.getNode(ISD::BITCAST, DL, LoadVT, Result); in adjustLoadValueTypeImpl()
3675 return DAG.getNode(ISD::BITCAST, DL, LoadVT, Result); in adjustLoadValueTypeImpl()
3743 Results.push_back(DAG.getNode(ISD::BITCAST, SL, MVT::v2f16, Cvt)); in ReplaceNodeResults()
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMISelLowering.cpp670 setOperationAction(ISD::BITCAST, MVT::i64, Custom); in ARMTargetLowering()
1162 Val = DAG.getNode(ISD::BITCAST, dl, VA.getValVT(), Val); in LowerCallResult()
1292 Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg); in LowerCall()
1805 Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg); in LowerReturn()
1875 } else if (Use->getOpcode() == ISD::BITCAST) { in isUsedByReturnOnly()
2564 ArgValue = DAG.getNode(ISD::BITCAST, dl, VA.getValVT(), ArgValue); in LowerFormalArguments()
3030 return DAG.getNode(ISD::BITCAST, dl, MVT::i32, Op); in LowerFP_TO_INT()
3080 Op = DAG.getNode(ISD::BITCAST, dl, MVT::f32, Op.getOperand(0)); in LowerINT_TO_FP()
3091 bool InGPR = Tmp0.getOpcode() == ISD::BITCAST || in LowerFCOPYSIGN()
3103 DAG.getNode(ISD::BITCAST, dl, OpVT, Mask), in LowerFCOPYSIGN()
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Nios2/
DNios2ISelLowering.cpp55 Val = DAG.getNode(ISD::BITCAST, DL, RVLocs[i].getLocVT(), Val); in LowerReturn()
137 ArgValue = DAG.getNode(ISD::BITCAST, DL, ValVT, ArgValue); in LowerFormalArguments()

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