/external/llvm/lib/Target/Mips/MCTargetDesc/ |
D | MipsNaClELFStreamer.cpp | 77 case Mips::BLTZAL: in isCall()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/MCTargetDesc/ |
D | MipsNaClELFStreamer.cpp | 86 case Mips::BLTZAL: in isCall()
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/external/v8/src/mips/ |
D | constants-mips.h | 581 BLTZAL = ((2U << 3) + 0) << 16, enumerator 1820 case BLTZAL: in IsLinkingInstruction() 1883 case BLTZAL: in IsForbiddenAfterBranchInstr()
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D | assembler-mips.cc | 535 rt_field == BLTZAL || rt_field == BGEZAL)) || in IsBranch() 561 return opcode == REGIMM && rt_field == BLTZAL && rs_field == 0; in IsNal() 1711 GenInstrImmediate(REGIMM, rs, BLTZAL, offset); in bltzal()
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D | disasm-mips.cc | 1740 case BLTZAL: in DecodeTypeImmediate()
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D | simulator-mips.cc | 6464 case BLTZAL: in DecodeTypeImmediate()
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/external/v8/src/mips64/ |
D | constants-mips64.h | 608 BLTZAL = ((2U << 3) + 0) << 16, enumerator 1903 case BLTZAL: in IsLinkingInstruction() 1966 case BLTZAL: in IsForbiddenAfterBranchInstr()
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D | assembler-mips64.cc | 514 rt_field == BLTZAL || rt_field == BGEZAL)) || in IsBranch() 540 return opcode == REGIMM && rt_field == BLTZAL && rs_field == 0; in IsNal() 1691 GenInstrImmediate(REGIMM, rs, BLTZAL, offset); in bltzal()
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D | disasm-mips64.cc | 1942 case BLTZAL: in DecodeTypeImmediateREGIMM()
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D | simulator-mips64.cc | 6703 case BLTZAL: in DecodeTypeImmediate()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
D | MipsInstrInfo.cpp | 299 case Mips::BLTZAL: in isBranchOffsetInRange()
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D | MipsDelaySlotFiller.cpp | 581 case Mips::BLTZAL: in getEquivalentCallShort()
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D | MipsScheduleP5600.td | 66 BLTZAL, BLTZALL, BLTZL, BNE, BNEL, BREAK,
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D | MipsInstrInfo.td | 2258 def BLTZAL : MMRel, BGEZAL_FT<"bltzal", brtarget, GPR32Opnd>, BGEZAL_FM<0x10>,
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/external/llvm/lib/Target/Mips/ |
D | MipsDelaySlotFiller.cpp | 550 case Mips::BLTZAL: in getEquivalentCallShort()
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D | MipsInstrInfo.td | 1896 def BLTZAL : MMRel, BGEZAL_FT<"bltzal", brtarget, GPR32Opnd>, BGEZAL_FM<0x10>,
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/external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
D | MipsInstrInfo.td | 738 def BLTZAL : BranchLink<"bltzal">;
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/external/capstone/arch/Mips/ |
D | MipsGenAsmWriter.inc | 262 21881U, // BLTZAL 1976 0U, // BLTZAL
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D | MipsGenDisassemblerTables.inc | 680 /* 1083 */ MCD_OPC_Decode, 245, 1, 51, // Opcode: BLTZAL
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/ |
D | MipsGenMCCodeEmitter.inc | 777 UINT64_C(68157440), // BLTZAL 5146 case Mips::BLTZAL: 8503 …HasStdEnc | Feature_NotMips32r6 | Feature_NotMips64r6 | Feature_NotInMicroMips | 0, // BLTZAL = 764
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D | MipsGenAsmWriter.inc | 1992 22500U, // BLTZAL 4623 0U, // BLTZAL
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D | MipsGenInstrInfo.inc | 779 BLTZAL = 764, 4824 …ideEffects), 0x12ULL, nullptr, ImplicitList3, OperandInfo170, -1 ,nullptr }, // Inst #764 = BLTZAL 10045 { Mips::BLTZAL, Mips::BLTZAL, Mips::BLTZAL_MM },
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D | MipsGenDisassemblerTables.inc | 3055 /* 1301 */ MCD::OPC_Decode, 252, 5, 183, 1, // Opcode: BLTZAL
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/external/llvm/lib/Target/Mips/AsmParser/ |
D | MipsAsmParser.cpp | 1550 case Mips::BLTZAL: in processInstruction()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/AsmParser/ |
D | MipsAsmParser.cpp | 1851 case Mips::BLTZAL: in processInstruction()
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