| /external/v8/src/mips/ |
| D | constants-mips.h | 734 BNZ_V = (((1U << 3) + 7) << kRsShift), enumerator
1646 case BNZ_V: in IsMSABranchInstr()
1752 case BNZ_V: in InstructionType()
1909 case BNZ_V: in IsForbiddenAfterBranchInstr()
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| D | disasm-mips.cc | 570 case BNZ_V: in PrintMsaDataFormat()
1722 case BNZ_V: in DecodeTypeImmediate()
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| D | assembler-mips.cc | 512 case BNZ_V: in IsMsaBranch()
3242 V(bnz_v, BNZ_V) \
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| D | simulator-mips.cc | 4253 case BNZ_V: in DecodeMsaDataFormat()
6421 case BNZ_V: { in DecodeTypeImmediate()
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| /external/v8/src/mips64/ |
| D | constants-mips64.h | 768 BNZ_V = (((1U << 3) + 7) << kRsShift), enumerator
1703 case BNZ_V: in IsMSABranchInstr()
1836 case BNZ_V: in InstructionType()
1992 case BNZ_V: in IsForbiddenAfterBranchInstr()
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| D | disasm-mips64.cc | 611 case BNZ_V: in PrintMsaDataFormat()
1924 case BNZ_V: in DecodeTypeImmediateCOP1()
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| D | assembler-mips64.cc | 491 case BNZ_V: in IsMsaBranch()
3559 V(bnz_v, BNZ_V) \
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| D | simulator-mips64.cc | 4464 case BNZ_V: in DecodeMsaDataFormat()
6660 case BNZ_V: { in DecodeTypeImmediate()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | MipsSEInstrInfo.cpp | 564 case Mips::BZ_V: return Mips::BNZ_V; in getOppositeBranchOpc()
569 case Mips::BNZ_V: return Mips::BZ_V; in getOppositeBranchOpc()
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| D | MipsInstrInfo.cpp | 428 case Mips::BNZ_V: in isBranchOffsetInRange()
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| D | MipsSEISelLowering.cpp | 1074 return emitMSACBranchPseudo(MI, BB, Mips::BNZ_V); in EmitInstrWithCustomInserter()
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| D | MipsMSAInstrInfo.td | 2848 def BNZ_V : BNZ_V_ENC, BNZ_V_DESC;
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/longbranch/ |
| D | branch-limits-msa.mir | 719 ; MSA: BNZ_V $w0, %bb.2, implicit-def $at {
742 ; PIC: BNZ_V $w0, %bb.3, implicit-def $at {
1344 BNZ_V killed renamable $w0, %bb.2, implicit-def dead $at
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| /external/capstone/arch/Mips/ |
| D | MipsGenAsmWriter.inc | 294 23425U, // BNZ_V
2008 0U, // BNZ_V
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| D | MipsGenDisassemblerTables.inc | 847 /* 1774 */ MCD_OPC_Decode, 149, 2, 69, // Opcode: BNZ_V
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| /external/llvm/lib/Target/Mips/ |
| D | MipsSEISelLowering.cpp | 1130 return emitMSACBranchPseudo(MI, BB, Mips::BNZ_V); in EmitInstrWithCustomInserter()
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| D | MipsMSAInstrInfo.td | 2841 def BNZ_V : BNZ_V_ENC, BNZ_V_DESC;
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/ |
| D | MipsGenMCCodeEmitter.inc | 820 UINT64_C(1172307968), // BNZ_V
4172 case Mips::BNZ_V:
8546 Feature_HasStdEnc | Feature_HasMSA | 0, // BNZ_V = 807
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| D | MipsGenAsmWriter.inc | 2035 24304U, // BNZ_V
4666 0U, // BNZ_V
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| D | MipsGenInstrInfo.inc | 822 BNZ_V = 807,
4867 …dSideEffects), 0x6ULL, nullptr, ImplicitList2, OperandInfo177, -1 ,nullptr }, // Inst #807 = BNZ_V
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| D | MipsGenDisassemblerTables.inc | 3304 /* 2599 */ MCD::OPC_Decode, 167, 6, 203, 1, // Opcode: BNZ_V
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| D | MipsGenAsmMatcher.inc | 5447 …{ 1556 /* bnz.v */, Mips::BNZ_V, Convert__MSA128AsmReg1_0__JumpTarget1_1, Feature_HasStdEnc|Featur…
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