Searched refs:BRANCH_COND (Results 1 – 10 of 10) sorted by relevance
| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.h | 224 BRANCH_COND, enumerator
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| D | AMDGPUInstrInfo.td | 259 def IL_brcond : SDNode<"AMDGPUISD::BRANCH_COND", SDTIL_BRCond, [SDNPHasChain]>;
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| D | R600Instructions.td | 1531 defm BRANCH_COND : BranchConditional<IL_brcond, R600_Reg32, R600_Reg32>;
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| D | R600ISelLowering.cpp | 1714 return DAG.getNode(AMDGPUISD::BRANCH_COND, SDLoc(Op), Op.getValueType(), in LowerBRCOND()
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| D | AMDGPUISelLowering.cpp | 2800 NODE_NAME_CASE(BRANCH_COND); in getTargetNodeName()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.h | 317 BRANCH_COND, enumerator
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| D | AMDGPUInstrInfo.td | 422 def IL_brcond : SDNode<"AMDGPUISD::BRANCH_COND", SDTIL_BRCond, [SDNPHasChain]>;
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| D | R600Instructions.td | 1566 defm BRANCH_COND : BranchConditional<IL_brcond, R600_Reg32, R600_Reg32>;
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| D | R600ISelLowering.cpp | 1531 return DAG.getNode(AMDGPUISD::BRANCH_COND, SDLoc(Op), Op.getValueType(), in LowerBRCOND()
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| D | AMDGPUISelLowering.cpp | 3994 NODE_NAME_CASE(BRANCH_COND); in getTargetNodeName()
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