Searched refs:BRASL (Results 1 – 16 of 16) sorted by relevance
| /external/v8/src/s390/ |
| D | assembler-s390.cc | 437 BRASL == opcode) { in target_at()
465 opcode == BRCL || opcode == BRASL || opcode == BRXH || in target_at_put()
475 } else if (BRCL == opcode || LARL == opcode || BRASL == opcode) { in target_at_put()
511 BRASL == opcode) { in max_reach_from()
|
| D | assembler-s390-inl.h | 248 if (BRASL == op1 || BRCL == op1) { in target_address_at()
310 if (BRASL == op1 || BRCL == op1) { in set_target_address_at()
|
| D | simulator-s390.h | 630 EVALUATE(BRASL);
|
| D | constants-s390.h | 733 V(brasl, BRASL, 0xC05) /* type = RIL_B BRANCH RELATIVE AND SAVE LONG */ \
|
| D | simulator-s390.cc | 921 EvalTable[BRASL] = &Simulator::Evaluate_BRASL; in EvalTableInit()
4698 EVALUATE(BRASL) { in EVALUATE() argument
4699 DCHECK_OPCODE(BRASL); in EVALUATE()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/ |
| D | SystemZAsmPrinter.cpp | 192 LoweredMI = MCInstBuilder(SystemZ::BRASL) in EmitInstruction()
299 LoweredMI = MCInstBuilder(SystemZ::BRASL) in EmitInstruction()
306 LoweredMI = MCInstBuilder(SystemZ::BRASL) in EmitInstruction()
578 EmitToStreamer(*OutStreamer, MCInstBuilder(SystemZ::BRASL) in LowerPATCHPOINT()
|
| D | SystemZScheduleZ196.td | 144 def : InstRW<[WLat1, LSU, FXU2, GroupAlone], (instregex "(Call)?BRASL$")>;
|
| D | SystemZScheduleZEC12.td | 149 def : InstRW<[WLat1, FXU2, LSU, GroupAlone], (instregex "(Call)?BRASL$")>;
|
| D | SystemZScheduleZ13.td | 161 def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "(Call)?BRASL$")>;
|
| D | SystemZScheduleZ14.td | 162 def : InstRW<[WLat1, FXa2, FXb, GroupAlone], (instregex "(Call)?BRASL$")>;
|
| D | SystemZInstrInfo.td | 253 def BRASL : CallRIL<"brasl", 0xC05>;
|
| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZAsmPrinter.cpp | 192 LoweredMI = MCInstBuilder(SystemZ::BRASL) in EmitInstruction()
299 LoweredMI = MCInstBuilder(SystemZ::BRASL) in EmitInstruction()
306 LoweredMI = MCInstBuilder(SystemZ::BRASL) in EmitInstruction()
|
| D | SystemZInstrInfo.td | 425 def BRASL : InstRIL<0xC05, (outs), (ins GR64:$R1, brtarget32tls:$I2),
|
| /external/capstone/arch/SystemZ/ |
| D | SystemZGenAsmWriter.inc | 405 11541175U, // BRASL
1752 // BRAS, BRASL, CGFRL, CGHRL, CGRL, CHRL, CLGFRL, CLGHRL, CLGRL, CLHRL, C...
|
| D | SystemZGenDisassemblerTables.inc | 878 /* 162 */ MCD_OPC_Decode, 128, 3, 92, // Opcode: BRASL
|
| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| D | SPUInstrInfo.td | 3430 def BRASL:
3453 (BRASL texternalsym:$func)>;
|