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Searched refs:BUS_WIDTH (Results 1 – 4 of 4) sorted by relevance

/external/u-boot/drivers/ddr/marvell/axp/
Dddr3_axp_config.h54 #define BUS_WIDTH 32 macro
56 #define BUS_WIDTH 64 macro
Dddr3_init.c359 __maybe_unused u32 ddr_width = BUS_WIDTH; in ddr3_init_main()
Dddr3_spd.c737 if (ddr3_get_min_val(sum_info.data_width, dimm_num, BUS_WIDTH) == 64) {
/external/u-boot/board/synopsys/axs10x/
Dnand.c15 #define BUS_WIDTH 8 /* AXI data bus width in bytes */ macro
110 writel(ALIGN(len, BUS_WIDTH) & BD_SIZES_BUFFER1_MASK, &bd->sizes); in axs101_nand_write_buf()
144 writel(ALIGN(len, BUS_WIDTH) & BD_SIZES_BUFFER1_MASK, &bd->sizes); in axs101_nand_read_buf()