Searched refs:BUS_WIDTH_IN_BITS (Results 1 – 5 of 5) sorted by relevance
12 u8 result_mat[MAX_INTERFACE_NUM][MAX_BUS_NUM][BUS_WIDTH_IN_BITS];15 u8 result_all_bit[MAX_BUS_NUM * BUS_WIDTH_IN_BITS * MAX_INTERFACE_NUM];98 for (bit = 0; bit < BUS_WIDTH_IN_BITS; bit++) { in ddr3_tip_pbs()103 bit + pup * BUS_WIDTH_IN_BITS], in ddr3_tip_pbs()216 for (bit = 0; bit < BUS_WIDTH_IN_BITS; bit++) { in ddr3_tip_pbs()222 BUS_WIDTH_IN_BITS], in ddr3_tip_pbs()232 bit = BUS_WIDTH_IN_BITS; in ddr3_tip_pbs()267 bit = BUS_WIDTH_IN_BITS; in ddr3_tip_pbs()375 for (bit = 0; bit < BUS_WIDTH_IN_BITS; bit++) { in ddr3_tip_pbs()377 result_all_bit[bit + pup * BUS_WIDTH_IN_BITS + in ddr3_tip_pbs()[all …]
57 u8 cur_start_win[BUS_WIDTH_IN_BITS]; in ddr3_tip_centralization()58 u8 centralization_result[MAX_INTERFACE_NUM][BUS_WIDTH_IN_BITS]; in ddr3_tip_centralization()59 u8 cur_end_win[BUS_WIDTH_IN_BITS]; in ddr3_tip_centralization()60 u8 current_window[BUS_WIDTH_IN_BITS]; in ddr3_tip_centralization()62 u8 final_pup_window[MAX_INTERFACE_NUM][BUS_WIDTH_IN_BITS]; in ddr3_tip_centralization()168 for (bit_id = 0; bit_id < BUS_WIDTH_IN_BITS; in ddr3_tip_centralization()221 bit_id < BUS_WIDTH_IN_BITS; in ddr3_tip_centralization()497 u8 cur_start_win[BUS_WIDTH_IN_BITS]; in ddr3_tip_special_rx()498 u8 cur_end_win[BUS_WIDTH_IN_BITS]; in ddr3_tip_special_rx()584 for (bit_id = 0; bit_id < BUS_WIDTH_IN_BITS; bit_id++) { in ddr3_tip_special_rx()[all …]
14 u32 phy_reg_bk[MAX_INTERFACE_NUM][MAX_BUS_NUM][BUS_WIDTH_IN_BITS];16 u32 training_res[MAX_INTERFACE_NUM * MAX_BUS_NUM * BUS_WIDTH_IN_BITS *319 [MAX_INTERFACE_NUM * MAX_BUS_NUM * BUS_WIDTH_IN_BITS * search + in ddr3_tip_get_buf_ptr()320 interface_num * MAX_BUS_NUM * BUS_WIDTH_IN_BITS]; in ddr3_tip_get_buf_ptr()492 mask_dq_num_of_regs = octets_per_if_num * BUS_WIDTH_IN_BITS; in ddr3_tip_ip_training()652 for (i = 0; i < BUS_WIDTH_IN_BITS; i++) { in ddr3_tip_process_result()663 for (i = 0; i < BUS_WIDTH_IN_BITS; i++) { in ddr3_tip_process_result()761 start_reg = pup_cnt * BUS_WIDTH_IN_BITS; in ddr3_tip_read_training_result()762 end_reg = (pup_cnt + 1) * BUS_WIDTH_IN_BITS - 1; in ddr3_tip_read_training_result()765 pup_cnt * BUS_WIDTH_IN_BITS + bit_num; in ddr3_tip_read_training_result()[all …]
72 #define BUS_WIDTH_IN_BITS 8 macro
2737 bit_end = BUS_WIDTH_IN_BITS - 1; in ddr3_tip_is_pup_lock()2759 for (cnt = 0; cnt < BUS_WIDTH_IN_BITS; cnt++) { in ddr3_tip_get_buf_min()2775 for (cnt = 0; cnt < BUS_WIDTH_IN_BITS; cnt++) { in ddr3_tip_get_buf_max()