Searched refs:BankedReg (Results 1 – 10 of 10) sorted by relevance
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMSystemRegister.td | 113 class BankedReg<string name, bits<8> enc>
124 def : BankedReg<"r8_usr", 0x00>;
125 def : BankedReg<"r9_usr", 0x01>;
126 def : BankedReg<"r10_usr", 0x02>;
127 def : BankedReg<"r11_usr", 0x03>;
128 def : BankedReg<"r12_usr", 0x04>;
129 def : BankedReg<"sp_usr", 0x05>;
130 def : BankedReg<"lr_usr", 0x06>;
131 def : BankedReg<"r8_fiq", 0x08>;
132 def : BankedReg<"r9_fiq", 0x09>;
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| D | ARMISelDAGToDAG.cpp | 3951 int BankedReg = getBankedRegisterMask(SpecialReg); in tryReadRegister() local
3952 if (BankedReg != -1) { in tryReadRegister()
3953 Ops = { CurDAG->getTargetConstant(BankedReg, DL, MVT::i32), in tryReadRegister()
4066 int BankedReg = getBankedRegisterMask(SpecialReg); in tryWriteRegister() local
4067 if (BankedReg != -1) { in tryWriteRegister()
4068 Ops = { CurDAG->getTargetConstant(BankedReg, DL, MVT::i32), N->getOperand(2), in tryWriteRegister()
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| D | ARMInstrFormats.td | 210 let Name = "BankedReg";
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
| D | ARMGenSystemRegister.inc | 82 const BankedReg *lookupBankedRegByName(StringRef Name);
83 const BankedReg *lookupBankedRegByEncoding(uint8_t Encoding);
87 const BankedReg BankedRegsList[] = {
123 const BankedReg *lookupBankedRegByName(StringRef Name) {
183 const BankedReg *lookupBankedRegByEncoding(uint8_t Encoding) {
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| D | ARMGenAsmMatcher.inc | 5916 // 'BankedReg' class
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/Utils/ |
| D | ARMBaseInfo.h | 151 struct BankedReg { struct
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 3991 int BankedReg = getBankedRegisterMask(SpecialReg); in tryReadRegister() local
3992 if (BankedReg != -1) { in tryReadRegister()
3993 Ops = { CurDAG->getTargetConstant(BankedReg, DL, MVT::i32), in tryReadRegister()
4112 int BankedReg = getBankedRegisterMask(SpecialReg); in tryWriteRegister() local
4113 if (BankedReg != -1) { in tryWriteRegister()
4114 Ops = { CurDAG->getTargetConstant(BankedReg, DL, MVT::i32), N->getOperand(2), in tryWriteRegister()
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| D | ARMInstrFormats.td | 207 let Name = "BankedReg";
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 805 struct BankedRegOp BankedReg; member
908 return BankedReg.Val; in getBankedReg()
3196 Op->BankedReg.Val = Reg; in CreateBankedReg()
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| /external/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 570 struct BankedRegOp BankedReg; member
666 return BankedReg.Val; in getBankedReg()
2871 Op->BankedReg.Val = Reg; in CreateBankedReg()
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