Searched refs:BaseReg2 (Results 1 – 7 of 7) sorted by relevance
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.h | 132 MachineInstr &SecondLdSt, unsigned BaseReg2,
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| D | AArch64InstrInfo.cpp | 2362 unsigned BaseReg2, in shouldClusterMemOps() argument
2364 if (BaseReg1 != BaseReg2) in shouldClusterMemOps()
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | TargetInstrInfo.h | 1150 MachineInstr &SecondLdSt, unsigned BaseReg2, in shouldClusterMemOps() argument
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.h | 168 MachineInstr &SecondLdSt, unsigned BaseReg2,
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| D | SIInstrInfo.cpp | 377 const MachineInstr &MI2, unsigned BaseReg2) { in memOpsHaveSameBasePtr() argument
378 if (BaseReg1 == BaseReg2) in memOpsHaveSameBasePtr()
407 unsigned BaseReg2, in shouldClusterMemOps() argument
409 if (!memOpsHaveSameBasePtr(FirstLdSt, BaseReg1, SecondLdSt, BaseReg2)) in shouldClusterMemOps()
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| /external/llvm/lib/CodeGen/ |
| D | MachinePipeliner.cpp | 1024 unsigned BaseReg1, BaseReg2; in addLoopCarriedDependences() local
1027 !TII->getMemOpBaseRegImmOfs(MI, BaseReg2, Offset2, TRI)) { in addLoopCarriedDependences()
1031 if (BaseReg1 == BaseReg2 && (int)Offset1 < (int)Offset2) { in addLoopCarriedDependences()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | MachinePipeliner.cpp | 1104 unsigned BaseReg1, BaseReg2; in addLoopCarriedDependences() local
1107 TII->getMemOpBaseRegImmOfs(MI, BaseReg2, Offset2, TRI)) { in addLoopCarriedDependences()
1108 if (BaseReg1 == BaseReg2 && (int)Offset1 < (int)Offset2) { in addLoopCarriedDependences()
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