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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/
DHexagonInstrInfo.cpp1832 unsigned BaseSubA = BaseA.getSubReg(); in areMemAccessesTriviallyDisjoint() local
1842 if (BaseRegA != BaseRegB || BaseSubA != BaseSubB) in areMemAccessesTriviallyDisjoint()