Home
last modified time | relevance | path

Searched refs:BitN (Results 1 – 14 of 14) sorted by relevance

/external/llvm/lib/Target/Hexagon/
DBitTracker.h255 const BitValue &operator[](uint16_t BitN) const {
256 assert(BitN < Bits.size());
257 return Bits[BitN];
259 BitValue &operator[](uint16_t BitN) {
260 assert(BitN < Bits.size());
261 return Bits[BitN];
387 RegisterCell eSET(const RegisterCell &A1, uint16_t BitN) const;
388 RegisterCell eCLR(const RegisterCell &A1, uint16_t BitN) const;
DBitTracker.cpp642 uint16_t BitN) const { in eSET()
643 assert(BitN < A1.width()); in eSET()
645 Res[BitN] = BitValue::One; in eSET()
651 uint16_t BitN) const { in eCLR()
652 assert(BitN < A1.width()); in eCLR()
654 Res[BitN] = BitValue::Zero; in eCLR()
DHexagonGenInsert.cpp292 : SelR(R), SelB(B), BitN(N), BitOrd(BO), CM(M) {} in RegisterCellBitCompareSel()
296 const unsigned BitN; member
337 uint16_t Bit1 = (VR1 == SelR) ? SelB : BitN; in operator ()()
338 uint16_t Bit2 = (VR2 == SelR) ? SelB : BitN; in operator ()()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/
DBitTracker.h307 const BitValue &operator[](uint16_t BitN) const {
308 assert(BitN < Bits.size());
309 return Bits[BitN];
311 BitValue &operator[](uint16_t BitN) {
312 assert(BitN < Bits.size());
313 return Bits[BitN];
438 RegisterCell eSET(const RegisterCell &A1, uint16_t BitN) const;
439 RegisterCell eCLR(const RegisterCell &A1, uint16_t BitN) const;
DBitTracker.cpp628 uint16_t BitN) const { in eSET()
629 assert(BitN < A1.width()); in eSET()
631 Res[BitN] = BitValue::One; in eSET()
636 uint16_t BitN) const { in eCLR()
637 assert(BitN < A1.width()); in eCLR()
639 Res[BitN] = BitValue::Zero; in eCLR()
DHexagonGenInsert.cpp311 : SelR(R), SelB(B), BitN(N), BitOrd(BO), CM(M) {} in RegisterCellBitCompareSel()
317 const unsigned BitN; member
357 uint16_t Bit1 = (VR1 == SelR) ? SelB : BitN; in operator ()()
358 uint16_t Bit2 = (VR2 == SelR) ? SelB : BitN; in operator ()()
/external/v8/src/arm64/
Dinstructions-arm64.cc99 int32_t n = BitN(); in ImmLogical()
Dassembler-arm64-inl.h997 Instr Assembler::BitN(unsigned bitn, unsigned reg_size) {
Dconstants-arm64.h188 V_(BitN, 22, 22, Bits) \
Dassembler-arm64.h2952 inline static Instr BitN(unsigned bitn, unsigned reg_size);
Dassembler-arm64.cc4158 Emit(SF(rd) | LogicalImmediateFixed | op | BitN(n, reg_size) | in LogicalImmediate()
/external/vixl/src/aarch64/
Dconstants-aarch64.h87 V_(BitN, 22, 22, ExtractBits) \
Dassembler-aarch64.h3691 static Instr BitN(unsigned bitn, unsigned reg_size) { in BitN() function
Dassembler-aarch64.cc5190 Emit(SF(rd) | LogicalImmediateFixed | op | BitN(n, reg_size) | in LogicalImmediate()