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Searched refs:CCM_NAND_CTRL_PLL6 (Results 1 – 3 of 3) sorted by relevance

/external/u-boot/arch/arm/include/asm/arch-sunxi/
Dclock_sun4i.h274 #define CCM_NAND_CTRL_PLL6 (0x1 << 24) macro
Dclock_sun6i.h334 #define CCM_NAND_CTRL_PLL6 (0x1 << 24) macro
/external/u-boot/drivers/mtd/nand/
Dsunxi_nand.c302 writel(CCM_NAND_CTRL_ENABLE | CCM_NAND_CTRL_PLL6 | in sunxi_nfc_set_clk_rate()