| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/ |
| D | SystemZSelectionDAGInfo.cpp | 170 static SDValue addIPMSequence(const SDLoc &DL, SDValue CCReg, in addIPMSequence() argument
172 SDValue IPM = DAG.getNode(SystemZISD::IPM, DL, MVT::i32, CCReg); in addIPMSequence()
187 SDValue CCReg = emitCLC(DAG, DL, Chain, Src1, Src2, Bytes); in EmitTargetCodeForMemcmp() local
188 Chain = CCReg.getValue(1); in EmitTargetCodeForMemcmp()
189 return std::make_pair(addIPMSequence(DL, CCReg, DAG), Chain); in EmitTargetCodeForMemcmp()
207 SDValue CCReg = End.getValue(1); in EmitTargetCodeForMemchr() local
215 CCReg}; in EmitTargetCodeForMemchr()
237 SDValue CCReg = Unused.getValue(1); in EmitTargetCodeForStrcmp() local
239 return std::make_pair(addIPMSequence(DL, CCReg, DAG), Chain); in EmitTargetCodeForStrcmp()
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| D | SystemZISelLowering.cpp | 2373 static SDValue emitSETCC(SelectionDAG &DAG, const SDLoc &DL, SDValue CCReg, in emitSETCC() argument
2378 DAG.getConstant(CCMask, DL, MVT::i32), CCReg }; in emitSETCC()
2528 SDValue CCReg = emitCmp(DAG, DL, C); in lowerSETCC() local
2529 return emitSETCC(DAG, DL, CCReg, C.CCValid, C.CCMask); in lowerSETCC()
2540 SDValue CCReg = emitCmp(DAG, DL, C); in lowerBR_CC() local
2543 DAG.getConstant(C.CCMask, DL, MVT::i32), Dest, CCReg); in lowerBR_CC()
2593 SDValue CCReg = emitCmp(DAG, DL, C); in lowerSELECT_CC() local
2595 DAG.getConstant(C.CCMask, DL, MVT::i32), CCReg}; in lowerSELECT_CC()
3656 static SDValue getCCResult(SelectionDAG &DAG, SDValue CCReg) { in getCCResult() argument
3657 SDLoc DL(CCReg); in getCCResult()
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| D | SystemZISelDAGToDAG.cpp | 1771 SDValue CCReg = Node->getOperand(4); in expandSelectBoolean() local
1773 SDValue Result = CurDAG->getNode(SystemZISD::IPM, DL, MVT::i32, CCReg); in expandSelectBoolean()
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| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 692 SDValue CCReg = SelectCC(N->getOperand(0), N->getOperand(1), CC, dl); in SelectSETCC() local
699 CCReg = CurDAG->getCopyToReg(CurDAG->getEntryNode(), dl, CR7Reg, CCReg, in SelectSETCC()
704 CCReg), 0); in SelectSETCC()
707 CR7Reg, CCReg), 0); in SelectSETCC()
1025 SDValue CCReg = SelectCC(N->getOperand(0), N->getOperand(1), CC, dl); in Select() local
1040 SDValue Ops[] = { CCReg, N->getOperand(2), N->getOperand(3), in Select()
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| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/InstPrinter/ |
| D | PPCInstPrinter.cpp | 175 unsigned CCReg = MI->getOperand(OpNo).getReg(); in printcrbitm() local
177 switch (CCReg) { in printcrbitm()
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| /external/llvm/lib/Target/PowerPC/InstPrinter/ |
| D | PPCInstPrinter.cpp | 357 unsigned CCReg = MI->getOperand(OpNo).getReg(); in printcrbitm() local
359 switch (CCReg) { in printcrbitm()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/InstPrinter/ |
| D | PPCInstPrinter.cpp | 400 unsigned CCReg = MI->getOperand(OpNo).getReg(); in printcrbitm() local
402 switch (CCReg) { in printcrbitm()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.h | 453 static inline MachineOperand condCodeOp(unsigned CCReg = 0) {
454 return MachineOperand::CreateReg(CCReg, false);
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| D | ARMConstantIslandPass.cpp | 1665 unsigned CCReg = MI->getOperand(2).getReg(); in fixupConditionalBr() local
1722 .addMBB(NextBB).addImm(CC).addReg(CCReg); in fixupConditionalBr()
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| /external/capstone/arch/PowerPC/ |
| D | PPCInstPrinter.c | 558 unsigned CCReg = MCOperand_getReg(MCInst_getOperand(MI, OpNo)); in printcrbitm() local
560 switch (CCReg) { in printcrbitm()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 2385 SDValue CCReg = SelectCC(LHS, RHS, CC, dl); in trySETCC() local
2392 CCReg = CurDAG->getCopyToReg(CurDAG->getEntryNode(), dl, CR7Reg, CCReg, in trySETCC()
2396 CCReg), 0); in trySETCC()
2791 SDValue CCReg = SelectCC(N->getOperand(0), N->getOperand(1), CC, dl); in Select() local
2807 SDValue CCBit = CurDAG->getTargetExtractSubreg(SRI, dl, MVT::i1, CCReg); in Select()
2852 SDValue Ops[] = { CCReg, N->getOperand(2), N->getOperand(3), in Select()
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMConstantIslandPass.cpp | 1468 unsigned CCReg = MI->getOperand(2).getReg(); in FixUpConditionalBr() local
1520 .addMBB(NextBB).addImm(CC).addReg(CCReg); in FixUpConditionalBr()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 3976 SDValue CCReg = SelectCC(LHS, RHS, CC, dl); in trySETCC() local
3989 CCReg = CurDAG->getCopyToReg(CurDAG->getEntryNode(), dl, CR7Reg, CCReg, in trySETCC()
3993 CCReg), 0); in trySETCC()
4577 SDValue CCReg = SelectCC(N->getOperand(0), N->getOperand(1), CC, dl); in Select() local
4593 SDValue CCBit = CurDAG->getTargetExtractSubreg(SRI, dl, MVT::i1, CCReg); in Select()
4646 SDValue Ops[] = { CCReg, N->getOperand(2), N->getOperand(3), in Select()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMConstantIslandPass.cpp | 1729 unsigned CCReg = MI->getOperand(2).getReg(); in fixupConditionalBr() local
1779 .addMBB(NextBB).addImm(CC).addReg(CCReg); in fixupConditionalBr()
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