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Searched refs:CEIL_W_D (Results 1 – 10 of 10) sorted by relevance

/external/v8/src/compiler/mips/
Dinstruction-scheduler-mips.cc356 CEIL_W_D = 4, enumerator
701 return Mfhc1Latency() + Latency::CEIL_W_D + Mthc1Latency(); in Ceil_w_dLatency()
703 return Latency::CEIL_W_D; in Ceil_w_dLatency()
/external/v8/src/compiler/mips64/
Dinstruction-scheduler-mips64.cc389 CEIL_W_D = 4, enumerator
1508 return Latency::CEIL_W_D + Latency::MFC1; in GetInstructionLatency()
/external/v8/src/mips/
Dconstants-mips.h641 CEIL_W_D = ((1U << 3) + 6), enumerator
Ddisasm-mips.cc1114 case CEIL_W_D: in DecodeTypeRegisterRsType()
Dassembler-mips.cc2940 GenInstrRegister(COP1, D, f0, fs, fd, CEIL_W_D); in ceil_w_d()
Dsimulator-mips.cc2900 case CEIL_W_D: // Round double to word towards positive infinity. in DecodeTypeRegisterDRsType()
/external/v8/src/mips64/
Dconstants-mips64.h671 CEIL_W_D = ((1U << 3) + 6), enumerator
Ddisasm-mips64.cc1187 case CEIL_W_D: in DecodeTypeRegisterRsType()
Dassembler-mips64.cc3331 GenInstrRegister(COP1, D, f0, fs, fd, CEIL_W_D); in ceil_w_d()
Dsimulator-mips64.cc3219 case CEIL_W_D: // Round double to word towards positive infinity. in DecodeTypeRegisterDRsType()