Searched refs:CEIL_W_D (Results 1 – 10 of 10) sorted by relevance
/external/v8/src/compiler/mips/ |
D | instruction-scheduler-mips.cc | 356 CEIL_W_D = 4, enumerator 701 return Mfhc1Latency() + Latency::CEIL_W_D + Mthc1Latency(); in Ceil_w_dLatency() 703 return Latency::CEIL_W_D; in Ceil_w_dLatency()
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/external/v8/src/compiler/mips64/ |
D | instruction-scheduler-mips64.cc | 389 CEIL_W_D = 4, enumerator 1508 return Latency::CEIL_W_D + Latency::MFC1; in GetInstructionLatency()
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/external/v8/src/mips/ |
D | constants-mips.h | 641 CEIL_W_D = ((1U << 3) + 6), enumerator
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D | disasm-mips.cc | 1114 case CEIL_W_D: in DecodeTypeRegisterRsType()
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D | assembler-mips.cc | 2940 GenInstrRegister(COP1, D, f0, fs, fd, CEIL_W_D); in ceil_w_d()
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D | simulator-mips.cc | 2900 case CEIL_W_D: // Round double to word towards positive infinity. in DecodeTypeRegisterDRsType()
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/external/v8/src/mips64/ |
D | constants-mips64.h | 671 CEIL_W_D = ((1U << 3) + 6), enumerator
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D | disasm-mips64.cc | 1187 case CEIL_W_D: in DecodeTypeRegisterRsType()
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D | assembler-mips64.cc | 3331 GenInstrRegister(COP1, D, f0, fs, fd, CEIL_W_D); in ceil_w_d()
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D | simulator-mips64.cc | 3219 case CEIL_W_D: // Round double to word towards positive infinity. in DecodeTypeRegisterDRsType()
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