| /external/v8/src/compiler/mips64/ |
| D | instruction-scheduler-mips64.cc | 388 CEIL_W_S = 4, enumerator
1516 return Latency::CEIL_W_S + Latency::MFC1; in GetInstructionLatency()
|
| /external/v8/src/compiler/mips/ |
| D | instruction-scheduler-mips.cc | 355 CEIL_W_S = 4, enumerator
1709 return Latency::CEIL_W_S; in GetInstructionLatency()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips2/ |
| D | valid.s | 49 # CHECK: # <MCInst #{{.*}} CEIL_W_S
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips3/ |
| D | valid.s | 49 # CHECK: # <MCInst #{{.*}} CEIL_W_S
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32/ |
| D | valid.s | 82 # CHECK: # <MCInst #{{.*}} CEIL_W_S
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32r5/ |
| D | valid.s | 82 # CHECK: # <MCInst #{{.*}} CEIL_W_S
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32r3/ |
| D | valid.s | 82 # CHECK: # <MCInst #{{.*}} CEIL_W_S
|
| /external/v8/src/mips/ |
| D | constants-mips.h | 614 CEIL_W_S = ((1U << 3) + 6), enumerator
|
| D | assembler-mips.cc | 2935 GenInstrRegister(COP1, S, f0, fs, fd, CEIL_W_S); in ceil_w_s()
|
| D | simulator-mips.cc | 3488 case CEIL_W_S: // Round double to word towards positive infinity. in DecodeTypeRegisterSRsType()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32r2/ |
| D | valid.s | 82 # CHECK: # <MCInst #{{.*}} CEIL_W_S
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64r3/ |
| D | valid.s | 81 # CHECK: # <MCInst #{{.*}} CEIL_W_S
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64/ |
| D | valid.s | 81 # CHECK: # <MCInst #{{.*}} CEIL_W_S
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64r5/ |
| D | valid.s | 81 # CHECK: # <MCInst #{{.*}} CEIL_W_S
|
| /external/v8/src/mips64/ |
| D | constants-mips64.h | 645 CEIL_W_S = ((1U << 3) + 6), enumerator
|
| D | assembler-mips64.cc | 3326 GenInstrRegister(COP1, S, f0, fs, fd, CEIL_W_S); in ceil_w_s()
|
| D | simulator-mips64.cc | 2900 case CEIL_W_S: // Round double to word towards positive infinity. in DecodeTypeRegisterSRsType()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips4/ |
| D | valid.s | 81 # CHECK: # <MCInst #{{.*}} CEIL_W_S
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips5/ |
| D | valid.s | 81 # CHECK: # <MCInst #{{.*}} CEIL_W_S
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64r2/ |
| D | valid.s | 81 # CHECK: # <MCInst #{{.*}} CEIL_W_S
|
| /external/llvm/lib/Target/Mips/ |
| D | MipsInstrFPU.td | 275 def CEIL_W_S : MMRel, StdMMR6Rel, ABSS_FT<"ceil.w.s", FGR32Opnd, FGR32Opnd, II_CEIL>,
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | MipsInstrFPU.td | 362 def CEIL_W_S : MMRel, StdMMR6Rel, ABSS_FT<"ceil.w.s", FGR32Opnd, FGR32Opnd, II_CEIL>,
|
| /external/capstone/arch/Mips/ |
| D | MipsGenAsmWriter.inc | 353 23073U, // CEIL_W_S
2067 0U, // CEIL_W_S
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/ |
| D | MipsGenMCCodeEmitter.inc | 872 UINT64_C(1174405134), // CEIL_W_S
3147 case Mips::CEIL_W_S:
8598 …sStdEnc | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CEIL_W_S = 859
|
| D | MipsGenInstrInfo.inc | 874 CEIL_W_S = 859,
4919 … 2, 1, 4, 687, 0, 0x4ULL, nullptr, nullptr, OperandInfo187, -1 ,nullptr }, // Inst #859 = CEIL_W_S
10054 { Mips::CEIL_W_S, Mips::CEIL_W_S, Mips::CEIL_W_S_MM },
10325 { Mips::CEIL_W_S, Mips::CEIL_W_S, Mips::CEIL_W_S_MMR6 },
|