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Searched refs:CEQI (Results 1 – 11 of 11) sorted by relevance

/external/v8/src/mips/
Dconstants-mips.h763 CEQI = ((0U << 23) + 7), enumerator
Ddisasm-mips.cc2112 case CEQI: in DecodeTypeMsaI5()
Dassembler-mips.cc1351 (operation == CEQI) || (operation == CLTI_S) || in GenInstrMsaI5()
3307 V(ceqi, CEQI) \
Dsimulator-mips.cc4452 case CEQI: in MsaI5InstrHelper()
/external/v8/src/mips64/
Dconstants-mips64.h797 CEQI = ((0U << 23) + 7), enumerator
Ddisasm-mips64.cc2426 case CEQI: in DecodeTypeMsaI5()
Dassembler-mips64.cc1315 (operation == CEQI) || (operation == CLTI_S) || in GenInstrMsaI5()
3624 V(ceqi, CEQI) \
Dsimulator-mips64.cc4663 case CEQI: in MsaI5InstrHelper()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMipsScheduleP5600.td345 def : InstRW<[P5600WriteFPUS], (instregex "^(CEQ|CEQI)_[BHWD]$")>;
DMipsScheduleGeneric.td948 def : InstRW<[GenericWriteFPUS], (instregex "^(CEQ|CEQI)_[BHWD]$")>;
/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/
DSPUInstrInfo.td3205 defm CEQI : CmpEqualWordImm;