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Searched refs:CFG_REG_2_OFFSET (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/mach-omap2/omap5/
Ddra7xx_iodelay.c56 reg = readl(base + CFG_REG_2_OFFSET); in calibrate_iodelay()
59 writel(reg, base + CFG_REG_2_OFFSET); in calibrate_iodelay()
88 refclk_period = readl(base + CFG_REG_2_OFFSET) & in calculate_delay()
/external/u-boot/arch/arm/include/asm/arch-omap5/
Ddra7xx_iodelay.h27 #define CFG_REG_2_OFFSET 0x14 macro