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Searched refs:CLKID_MPLL2 (Results 1 – 4 of 4) sorted by relevance

/external/u-boot/drivers/clk/
Dclk_meson.c121 MESON_GATE(CLKID_MPLL2, HHI_MPLL_CNTL9, 14),
169 CLKID_MPLL2, in meson_clk81_get_rate()
245 case CLKID_MPLL2: in meson_mpll_get_rate()
339 case CLKID_MPLL2: in meson_clk_get_rate_by_id()
/external/u-boot/include/dt-bindings/clock/
Dgxbb-clkc.h21 #define CLKID_MPLL2 15 macro
/external/u-boot/arch/arm/dts/
Dmeson-gxbb.dtsi288 <&clkc CLKID_MPLL2>;
Dmeson-gxl.dtsi92 <&clkc CLKID_MPLL2>;