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Searched refs:CLK_DIV_CAM_VAL (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/mach-exynos/
Dclock_init_exynos4.c73 writel(CLK_DIV_CAM_VAL, &clk->div_cam); in system_clock_init()
Dexynos4_setup.h288 #define CLK_DIV_CAM_VAL ((FIMC3_LCLK_RATIO << 12) \ macro