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Searched refs:CLK_DIV_LCD0_VAL (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/mach-exynos/
Dclock_init_exynos4.c76 writel(CLK_DIV_LCD0_VAL, &clk->div_lcd0); in system_clock_init()
Dexynos4_setup.h331 #define CLK_DIV_LCD0_VAL (FIMD0_RATIO) macro