Searched refs:CLK_DIV_LEFTBUS_VAL (Results 1 – 4 of 4) sorted by relevance
66 writel(CLK_DIV_LEFTBUS_VAL, &clk->div_leftbus); in system_clock_init()
160 #define CLK_DIV_LEFTBUS_VAL ((GPL_RATIO << 4) | (GDL_RATIO)) macro
326 writel(CLK_DIV_LEFTBUS_VAL, (unsigned int)&clk->div_leftbus); in board_clock_init()
117 #define CLK_DIV_LEFTBUS_VAL ((GPL_RATIO << 4) | (GDL_RATIO)) macro