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Searched refs:CLK_GATE_DP1_ALLOW (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/mach-exynos/
Dexynos5_setup.h237 #define CLK_GATE_DP1_ALLOW (1 << 4) macro
Dclock_init_exynos5.c983 setbits_le32(&clk->gate_ip_disp1, CLK_GATE_DP1_ALLOW); in clock_init_dp_clock()