Searched refs:CLK_GATE_OPEN (Results 1 – 8 of 8) sorted by relevance
58 CLK_GATE_OPEN << (APB2_GATE_TWI_SHIFT + port)); in clock_twi_onoff()65 CLK_GATE_OPEN << (APB2_GATE_TWI_SHIFT + port)); in clock_twi_onoff()
76 CLK_GATE_OPEN << (APB1_GATE_UART_SHIFT + in clock_init_uart()185 CLK_GATE_OPEN << (APB1_GATE_TWI_SHIFT + port)); in clock_twi_onoff()192 CLK_GATE_OPEN << (APB1_GATE_TWI_SHIFT + port)); in clock_twi_onoff()
61 CLK_GATE_OPEN << (APB1_GATE_UART_SHIFT+CONFIG_CONS_INDEX - 1)); in clock_init_uart()72 CLK_GATE_OPEN << (APB1_GATE_TWI_SHIFT + port)); in clock_twi_onoff()75 CLK_GATE_OPEN << (APB1_GATE_TWI_SHIFT + port)); in clock_twi_onoff()
64 CLK_GATE_OPEN << (APB2_GATE_UART_SHIFT + in clock_init_uart()
96 CLK_GATE_OPEN << (APB2_GATE_UART_SHIFT + in clock_init_uart()
13 #define CLK_GATE_OPEN 0x1 macro
541 clrbits_le32(&ccm->ahb_gate0, (CLK_GATE_OPEN << AHB_GATE_OFFSET_NAND0)); in nand_deselect()
289 setbits_le32(&ccm->ahb_gate0, (CLK_GATE_OPEN << AHB_GATE_OFFSET_NAND0)); in nand_clock_setup()